This is the code used to exits M-Mode.
hart0 was paused before , because hart0 does not support S-Mode and cannot run
kernel code.
So there is no status information for hart0.
------------------
王翔
安全研究员
广州市腾御安信息科技有限公司
广州市天河区珠江新城华穗路406号保利克洛维二期中景A座1020-1024
This is the code used to exits M-Mode. hart0 was paused before , because
hart0 does not support S-Mode and cannot run kernel code.
------------------ Original ------------------This is the code used to exits
M-Mode. hart0 was paused before , because hart0 does not support S-Mode and
cannot run kernel code.
From: "Jonathan Neuschäfer"<[email protected]>;This is the code used to
exits M-Mode. hart0 was paused before , because hart0 does not supThis is the
code used to exits M-Mode. hart0 was paused before , because hart0 does not
support S-Mode and cannot run kernel code.
port S-Mode and cannot run kernel code.This is the code used to exits M-Mode.
hart0 was paused before , because hart0 does not support S-Mode and cannot run
kernel code.
Date: Mon, Dec 10, 2018 07:16 PMThis is the code used to exits M-Mode. hart0
was paused before , because hart0 does not support S-Mode and cannot run
kernel code.
To: "王翔"<[email protected]>;
Cc: "coreboot"<[email protected]>; "j.neuschaefer"<[email protected]>;
"philipp"<[email protected]>; "citypw"<[email protected]>; This is the code used to
exits M-Mode. hart0 was paused before , because hart0 does not support S-Mode
and cannot run kernel code.
Subject: Re: The problem of coreboot porting to fu540
Hi,
On Mon, Dec 10, 2018 at 05:29:44PM +0800, 王翔 wrote:This is the code used to
exits M-Mode. hart0 was paused before , because hart0 does not support S-Mode
and cannot run kernel code.
This is the code used to exits M-Mode. hart0 was paused before , because hart0
does not support S-Mode and cannot run kernThis is the code used to exits
M-Mode. hart0 was paused before , because hart0 does not support S-Mode and
cannot run kernel code.
el code.
> I use bbl as the coreboot's payload, bbl can start and running into the
> enter_supervisor_mode function, but can't continue. This is the code used to
> exits M-Mode. hart0 was paused before , because hart0 does not support
> S-Mode and cannot run kernel code.
>
> I added some code to print register state before mret and print memory on
> target address.
> I debugged it for a long time and didn't know where the problem was. hoping
> to get your help.
>
>
> Below is my output:
>
> ```
>
> mhartid : 2
[...]
> mhartid : 1
[...]
> mhartid : 3
[...]
> mhartid : 4
[...]
My first guess is that BBL is waiting for Hart 0, but I have not looked
at BBL's code to verify that this could be the case.
Jonathan
--
coreboot mailing list: [email protected]
https://mail.coreboot.org/mailman/listinfo/coreboot
