On 2/19/19 7:50 PM, Zvi Vered wrote:
> Hi Michal,
>
> Thank you very much for your reply. 
>
> You are right. I have soldered down memory. No dimm slot. 
> In what routine should I  configure RAM ?  Where can I see a sample code ?
coreboot has everything prepared for that. What I would do is to look at
existing BayTrail platforms supported in coreboot (e.g. Intel Minnow
Max), which uses FSP. As it is BayTrail it will surely be FSP1.0.
>
> From the RAM vendor I got the following table:
>
> Part Number   Byte Number     Byte Description        Byte Value
> MT4KTF25664HZ-1G9P1   0       DDR3-CRC RANGE; EEPROM BYTES; BYTES USED        
> 92
> MT4KTF25664HZ-1G9P1   1       DDR3-SPD REVISON        13
> MT4KTF25664HZ-1G9P1   2       DDR3-DRAM DEVICE TYPE   0B
> MT4KTF25664HZ-1G9P1   3       DDR3-MODULE TYPE (FORM FACTOR)  3
>
> ....
>
> Is it possible to use FSP but not for RAM setup ?  How ?
> FSP has many features which I want to use. I do not want to write all
> by myself.

Great that You have found the SPD. AFAIK FSP1.0 has only one entry
available (except TempRamInit), i.e. FspInit which initializes memory
and silicon. It is inseparable comparing to FSP1.1 or FSP2.0, so
everything has to be set right away from the start. FSP will always be
used for RAM setup for BayTrail, unless You have a MRC binary. Of course
there are some boards that do not need any blob for memory
initialization, but this is out of scope of this topic.

Most configuration settings for FSP is defined in mainboard's
devicetree.cb file. What You would have to do in the devicetree is to
set EnableMemoryDown option and all other memory parameters DIMM* and
DRAM* (taken from SPD) as listed here (only example of minnowmax):
https://github.com/coreboot/coreboot/blob/master/src/mainboard/intel/minnowmax/devicetree.cb#L36

You don't need to worry much about writing code, since everything is
almost in place. Have a look at:
src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c and
src/drivers/intel/fsp1_0/fsp_util.c

The settings are automatically filled and FspInitApi is called with the
parameters You set in devicetree.
What You only need is to create a mainboard directory for Your platform
and implement few necessary callbacks. First and foremost, coreboot is a
framework :)

>
> Best regards,
> Zvika 
>
Best regards,
Michał

-- 
Michał Żygowski
Firmware Engineer
http://3mdeb.com | @3mdeb_com

_______________________________________________
coreboot mailing list -- [email protected]
To unsubscribe send an email to [email protected]

Reply via email to