Angel Pons wrote: > (both chips end up being enabled at once) .. > To prevent that, you would want to put a resistor between pin 1 and pin 8 > on the inactive chip.
I'd suggest a 1k resistor between pin 4 (GND) and pin 7 (/HOLD) instead, since your situation is the purpose of the hold pin. Verify that it works correctly by measuring a rather low voltage on pin 7, ideally 0 V but in practice up to 0.8 V is fine. If you measure an even higher voltage with the resistor connected then the mainboard design is such that the flash chip hold pin can't be used. You can still try Angel's suggestion. > The voltage on said pin 1 should then be 3.3 V, > which would disable that chip. The voltage in both our suggestions depends on the resistor value and on what circuit is on the mainboard. When any resistor is involved the voltage level will not be ideal, but possibly a fair bit off. On a 3.3 V flash chip any voltage on pin 1 (/CS) above 2.4 V is fine, it doesn't have to be 3.3 V. Also note that because pin 1 is actively used when communicating with the flash chip (as opposed to pin 7) you will only be able to measure the result of your resistor using an oscilloscope while either mainboard or your flasher is trying to access the flash chip. The voltage on pin 1 when there is no ongoing access isn't meaningful. //Peter _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
