On Wed, May 29, 2019 at 5:48 PM <[email protected]> wrote: > > There is motherboard based on the Intel Rangeley Atom C2000 (C2758) series > processor. How to enable the SMBus0 in coreboot? If I use OEM BIOS or BIOS > from Intel (EDVLCRB1.86B.0048.R00.1508181657_MPK) for mohon peak crb, then I > see on the SMBus0 (i2c-1 in Fedora 28) memory DIMM spd (0x50 & 0x52), clock > generator (0x69) and other devices. If I use a coreboot based bios for the > Mohon peak platform - I do not see any devices on i2c-1. I see an data > exchange on the SMBus0 with oscilloscope at boot time only. When I send > "i2cdetect -y 1" command in Linux no activity on SMBus0 and no device found.
Your chances of getting support are much better when you provide more context and logfiles. We would probably need relevant lines from system logs (dmesg) and outputs from 'i2cdetect' and 'lspci -xx' here, both OEM BIOS and coreboot. For coreboot, also 'cbmem -1'. Would not hurt if you pushed your mainboard port as a draft to gerrit or make your work otherwise accesible. What we have in rangeley_smbus_read_resources() does not look that good, it may leave SMBUS IO BAR unset in the hardware. Might be simply case of calling enable_smbus() in romstage for the board to get that fixed. Regards, Kyösti Mälkki _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
