I'm not sure, but it seems that missing definition of gameport for 986lcd-m in src/mainboard/kontron/986lcd-m/devicetree.cb can cause PNP autodetection for superIO to compute a wrong IO limit, which later causes wrong/missing/incompatible IO port resource allocations, so some devices won't work (0x60/0x64 PS/2, PCIe GPU, OHCI, uart console) or the boot freezes. Some of the logs:
Done reading resources. Setting resources... !! Resource didn't fit !! aligned base 1000 size 1000 limit 2e7 1fff needs to be <= 2e7 (limit) PCI: 00:1c.0 1c * [0x0 - 0xfff] io !! Resource didn't fit !! aligned base 1000 size 1000 limit 2e7 1fff needs to be <= 2e7 (limit) PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io !! Resource didn't fit !! aligned base 1000 size 1000 limit 2e7 1fff needs to be <= 2e7 (limit) PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io !! Resource didn't fit !! aligned base 400 size 10 limit 2e7 40f needs to be <= 2e7 (limit) PCI: 00:1f.2 20 * [0x3080 - 0x308f] io !! Resource didn't fit !! ... ERROR: PCI: 00:02.0 14 io size: 0x0000000008 not assigned ... ERROR: PCI: 00:1f.2 10 io size: 0x0000000008 not assigned ERROR: PCI: 00:1f.2 14 io size: 0x0000000004 not assigned ERROR: PCI: 00:1f.2 18 io size: 0x0000000008 not assigned ERROR: PCI: 00:1f.2 1c io size: 0x0000000004 not assigned ERROR: PCI: 00:1f.2 20 io size: 0x0000000010 not assigned ... PCI: 00:1b.0 subsystem <- 8086/27d8 PCI: 00:1b.0 cmd <- 102 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 subsystem <- 8086/27d0 PCI: 00:1c.0 cmd <- 107 PCI: 00:1c.1 brids70c01mcu0PeC: 0 dV0i8s0immicrocode: upd10a00000y0025 x666600CPU physiaB 0 0 e k MTRR cheaeu60zeAttemfWaiting for 1st Sot AP: slot 1 apic_L0ecl0zsax a aInitiNntt kac:oIG0 Ua dUrSGSGL Ct0C07fintel_vga_int15_h VGA Option ROM wa7..Azalia0Azalia: codkAbCiPCI: 00:1c.0 init finished in 222 usecs After enabling SPEW I've found a weird limit values: PCI: 00:1f.1 18 * [0x50b8 - 0x50bf] io PCI: 00:1f.2 10 * [0x50c0 - 0x50c7] io PCI: 00:1f.2 18 * [0x50c8 - 0x50cf] io PCI: 00:1f.1 14 * [0x50d0 - 0x50d3] io PCI: 00:1f.1 1c * [0x50d4 - 0x50d7] io PCI: 00:1f.2 14 * [0x50d8 - 0x50db] io PCI: 00:1f.2 1c * [0x50dc - 0x50df] io PNP: 002e.7 60 * [0x50e0 - 0x50e0] io DOMAIN: 0000 io: base: 50e1 size: 40e1 align: 12 gran: 0 limit: 7ff done "PNP: 002e.7 60" is that undefined gameport base. It seems the autodetection (IMO defined as IORESOURCE_FIXED) forces DOMAIN resources to have limit = 0x7ff, which is not enough for anything. The value later applies to the whole domain (all PCI): Setting resources... DOMAIN: 0000 io: base:1000 size:40e1 align:12 gran:0 limit:7ff and the original warnings: !! Resource didn't fit !! aligned base 1000 size 1000 limit 7ff 1fff needs to be <= 7ff (limit) PCI: 00:01.0 1c * [0x1000 - 0x1fff] io PCI: 00:01.0 1c * [0x1000 - 0x1fff] io PCI: 00:01.0 1c * [0x1000 - 0x1fff] io !! Resource didn't fit !! aligned base 1000 size 1000 limit 7ff 1fff needs to be <= 7ff (limit) PCI: 00:1c.0 1c * [0x2000 - 0x2fff] io PCI: 00:1c.0 1c * [0x2000 - 0x2fff] io Setting the base in devicetree.cb: device pnp 2e.7 on # GPIO1, GAME, MIDI io 0x60 = 0x220 #gameport? io 0x62 = 0x330 irq 0x70 = 9 end fixes it. But the problem is there is no gameport routed on the board, so this allocation is overkill. Maybe the whole logical device could be disabled. Is there MIDI and GPIO port 1/5 routed anywhere? I'm not sure if PNP autodetection could be changed to ignore undefined PNP (it is global function). Petr Cvek _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
