On Fri, Sep 27, 2019 at 3:58 PM Aaron Durbin via coreboot <coreboot@coreboot.org> wrote: >> > >> > 5. PCI coalesce can alter PCI dev.fn assignments? >> >> That's a serious problem. I noticed that CFL FSP can reassign them >> without being asked to, unpredictably (e.g. if a device fails to show >> up in whatever timeframe FSP assumes). Solution might be simple? A >> chip->enable_dev() that updates b/d/f based on DID? > > > Ya. I think that's likely what is required.
https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src/soc/intel/skylake/chip_fsp20.c#88 This function should really be in common code (and I guess called from SOC specific to supply the list) as it only seems to exist in skylake/apollolake dirs... -duncan _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
