On Fri, Dec 13, 2019 at 1:38 PM Github Hun <[email protected]> wrote: > > Hi, > > just to give a heads-up status: as of today (13.12.2019) with the current > Master revision, I can confirm, that for lenovo/g505s coreboot builds and > boots perfectly with ROMCC_BOOTBLOCK already removed.
Upload the board-status, please !! > There are two modifications are needed though: > 1. revise commit: 0178760 on Oct 25: 'Don't use both of _ADR and _HID' patch > --> for Fam15h '_CID' is missing from: > src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl Please elaborate, or better yet push a fix. > therefore, you have to add this (from eg. fam14h asl file). Otherwise Linux > will not boot (4.19.x and 5.3.x, 5.4.x...). > 2. in lenovo/g505s/bootblock.c, you'll need an 'empty' > bootblock_mainboard_early_init(void) function. Of course if you'll ever need > PCI debug card support, then the LPC code will need to be still fixed (eg. > from Gizmo2?) Empty bootblock_mainboard_early_init() is in lib/bootblock.c already. What exactly do you think is broken with LPC? Kyösti _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
