Dear Michal,
I am sorry for the late reply but on Friday something went wrong with my
coreboot installation and was unable to boot and I have to reinstall it again
and I just resumed this morning on this issue.
(you) don't think loading the watchdog module will help in any way, actually
the opposite.
(Me) I did the modprobe of the watchdog module just to ask linux to give me the
base address of the runtime registers "0xa00" of the original bios.
(you) I recommend using https://github.com/adurbin/iotools
(you) Superiotool will simply dump all registers and may alternatively dump IO
too.
(Me) Thank you for your great advice I will go by the Superiotool route
(patching it) but so far I am dumping using "ioports" in the following way:
on root:
for i in $(seq 0xa00 0xa7f); do echo -n "$i: "; inb $i; done; $i = $((++i))
(you) I assume you have configured runtime registers IOBASE right?
(Me) I found out (because of your advise) that the runtime registers base
address was wrong on my devicetree (0xe00 instead 0xa00) I set it correctly
then linux was able to "see" this range and dumped the registers with the
string shown above.
Now I can compare both dumps and I can see the pins for the UART ports 2-4 are
all GPIO inputs (1).
(Me) I set manually the GPIOs from linux using ioport's function outb and all
the 4 ports work correctly.
Now I am trying to set from coreboot but I am still unsuccessful.
Looking at you dell Optiplex 9010 you set the following runtime registers under
romstage.c -> mainboard_early_init
/* Disable SMIs and clear SMI status */
outb(0, SCH5545_RUNTIME_REG_BASE + SCH5545_RR_SMI_EN);
outb(SCH5545_SMI_GLOBAL_STS, SCH5545_RUNTIME_REG_BASE + SCH5545_RR_SMI_STS);
and I do similar to you under romstage.c -> mainboard_early_init:
outb(0x55, 0x2e);
outb(0x05, 0x0a3f); /* GP50= RI_2 : in */
outb(0x05, 0x0a40); /* GP51= DCD_2 : in */
outb(0x05, 0x0a41); /* GP52= RXD_2 : in */
outb(0x04, 0x0a42); /* GP53= TXD_2 : out */
outb(0x05, 0x0a43); /* GP54= DSR_2 : in */
outb(0x04, 0x0a44); /* GP55= RTS_2 : out */
outb(0x05, 0x0a45); /* GP56= CTS_2 : in */
outb(0x04, 0x0a46); /* GP57= DTR_2 : out */
outb(0xaa, 0x2e);
but It doesn't work.
Also I set the same code under mainboard.c -> mainboard_init but neither work.
Any advice on this? because I cannot find any information on the datasheet on
how to set those registers and I suppose I just have to set to the 0xa00 base
address + register.
Thank you,
Jose Trujillo.
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