Dear coreboot folks,

Trying to finish the Asus F2A85-M PRO coreboot port (AMD Family 15h/Hudson), the internal network device does not work with the state from [1].

With the vendor firmware 6601, it is

04:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 09)

behind PCI bridge 00:15.2.

-[0000:00]-+-00.0
           +-00.2
           +-01.0
           +-01.1
           +-10.0
           +-10.1
           +-11.0
           +-12.0
           +-12.2
           +-13.0
           +-13.2
           +-14.0
           +-14.2
           +-14.3
           +-14.4-[01]--
           +-15.0-[02]--
           +-15.1-[03]----00.0
           +-15.2-[04]----00.0
           +-18.0
           +-18.1
           +-18.2
           +-18.3
           +-18.4
           \-18.5

In the current state [1], coreboot says device 00:15.2 is disabled

Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 10: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 0
PCI: 00:18.0: enabled 1

But it is enabled in the devicetree `src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb`.

    device pci 15.2 on end # PCI bridge

Please find the spew log attached. Any help is appreciated.


Kind regards,

Paul


[1]: https://review.coreboot.org/c/coreboot/+/46021/
     "mb/asus/f2a85-m_pro: Enable super-i/o LDNs 0x0f and 0x14"
coreboot-4.12-3297-g85428b151f-dirty Tue Oct 13 19:25:05 UTC 2020 bootblock 
starting (log level: 8)...
FMAP: Found "FLASH" version 1.1 at 0x0.
FMAP: base = 0xff800000 size = 0x800000 #areas = 3
FMAP: area COREBOOT found @ 200 (8388096 bytes)
CBFS: Locating 'fallback/romstage'
CBFS: Found @ offset 30000 size 5776c
BS: bootblock times (exec / console): total (unknown) / 16 ms


coreboot-4.12-3297-g85428b151f-dirty Tue Oct 13 19:25:05 UTC 2020 romstage 
starting (log level: 8)...
APIC 00: CPU Family_Model = 00610f31

APIC 00: ** Enter AmdInitReset [00020007]

AmdInitReset: Start


*** !!AGESA cb_AgesaV0.0.0.1     ***

    FCH Reset Data Block Allocation: [0x0], Ptr = 0x004001e0
Fch OEM config in INIT RESET
PCI: 00:14.4 bridge ctrl <- 0013
PCI: 00:14.4 cmd <- 00
PCI: 00:14.5 cmd <- 02
PCI: 00:15.0 bridge ctrl <- 0013
PCI: 00:15.0 cmd <- 00
PCI: 00:15.1 bridge ctrl <- 0013
PCI: 00:15.1 cmd <- 06
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1410
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1410
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1410
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1410
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1410
PCI: 00:18.5 cmd <- 00
PCI: 03:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE run times (exec / console): 1 / 25 ms
Initializing devices...
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC...
 apic_id: 0x10 done.
siblings = 01, CPU #0 initialized
CPU1: stack_base 0x5fef3000, stack_top 0x5fef3ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC...
 apic_id: 0x11 done.
siblings = 01, CPU #1 initialized
All AP CPUs stopped (1060 loops)
CPU0: stack: 0x5fef4000 - 0x5fef5000, lowest used address 0x5fef455c, stack 
used: 2724 bytes
CPU1: stack: 0x5fef3000 - 0x5fef4000, lowest used address 0x5fef3dbc, stack 
used: 580 bytes
CPU_CLUSTER: 0 init finished in 64 msecs
PCI: 00:00.0 init
PCI: 00:00.0 init finished in 0 msecs
PCI: 00:01.0 init
PCI: 00:01.0 init finished in 0 msecs
PCI: 00:01.1 init
PCI: 00:01.1 init finished in 0 msecs
PCI: 00:10.0 init
PCI: 00:10.0 init finished in 0 msecs
PCI: 00:10.1 init
PCI: 00:10.1 init finished in 0 msecs
PCI: 00:11.0 init
PCI: 00:11.0 init finished in 0 msecs
PCI: 00:12.0 init
PCI: 00:12.0 init finished in 0 msecs
PCI: 00:12.2 init
PCI: 00:12.2 init finished in 0 msecs
PCI: 00:13.0 init
PCI: 00:13.0 init finished in 0 msecs
PCI: 00:13.2 init
PCI: 00:13.2 init finished in 0 msecs
PCI: 00:14.0 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x10
IOAPIC: ID = 0x04
IOAPIC: Dumping registers
  reg 0x0000: 0x04000000
  reg 0x0001: 0x00178021
  reg 0x0002: 0x04000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 init finished in 66 msecs
PCI: 00:14.2 init
PCI: 00:14.2 init finished in 0 msecs
PCI: 00:14.3 init
RTC Init
PCI: 00:14.3 init finished in 0 msecs
PCI: 00:14.5 init
PCI: 00:14.5 init finished in 0 msecs
PCI: 00:15.0 init
PCI: 00:15.0 init finished in 0 msecs
PCI: 00:15.1 init
PCI: 00:15.1 init finished in 0 msecs
PCI: 00:18.1 init
PCI: 00:18.1 init finished in 0 msecs
PCI: 00:18.2 init
PCI: 00:18.2 init finished in 0 msecs
PCI: 00:18.3 init
PCI: 00:18.3 init finished in 0 msecs
PCI: 00:18.4 init
PCI: 00:18.4 init finished in 0 msecs
PCI: 00:18.5 init
PCI: 00:18.5 init finished in 0 msecs
PNP: 002e.2 init
PNP: 002e.2 init finished in 0 msecs
PNP: 002e.5 init
PNP: 002e.5 init finished in 0 msecs
PNP: 002e.108 init
PNP: 002e.108 init finished in 0 msecs
PNP: 002e.109 init
PNP: 002e.109 init finished in 0 msecs
PNP: 002e.209 init
PNP: 002e.209 init finished in 0 msecs
PNP: 002e.309 init
PNP: 002e.309 init finished in 0 msecs
PNP: 002e.409 init
PNP: 002e.409 init finished in 0 msecs
PNP: 002e.509 init
PNP: 002e.509 init finished in 0 msecs
PNP: 002e.609 init
PNP: 002e.609 init finished in 0 msecs
PNP: 002e.709 init
PNP: 002e.709 init finished in 0 msecs
PNP: 002e.a init
PNP: 002e.a init finished in 0 msecs
PNP: 002e.b init
PNP: 002e.b init finished in 0 msecs
PNP: 002e.f init
PNP: 002e.f init finished in 0 msecs
PNP: 002e.14 init
PNP: 002e.14 init finished in 0 msecs
PCI: 03:00.0 init
PCI: 03:00.0 init finished in 0 msecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 10: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 0
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.8: enabled 0
PNP: 002e.108: enabled 1
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 1
PNP: 002e.209: enabled 1
PNP: 002e.309: enabled 1
PNP: 002e.409: enabled 1
PNP: 002e.509: enabled 1
PNP: 002e.609: enabled 1
PNP: 002e.709: enabled 1
PNP: 002e.a: enabled 1
PNP: 002e.b: enabled 1
PNP: 002e.d: enabled 0
PNP: 002e.e: enabled 0
PNP: 002e.f: enabled 1
PNP: 002e.14: enabled 1
PNP: 002e.16: enabled 0
APIC: 11: enabled 1
PCI: 00:14.5: enabled 1
PCI: 03:00.0: enabled 1
BS: BS_DEV_INIT run times (exec / console): 23 / 275 ms
Finalize devices...
PCI: 00:14.3 final
Devices finalized
BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms

APIC 00: ** Enter AmdInitLate [00020004]
AmdInitLate: Start

CreatSystemTable: Start
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
  SSDT is created
  F15TnGetPstateTransLatency
  F15TnGetFrequencyXlatRegInfo - PstateNumber=0, Frequency=0
  F15TnGetPstateFrequency - P0
    FrequencyInMHz=4100, CpuFid=25, CpuDid=0
  CpuFidPtr=255, CpuDidPtr1=0xff, CpuDidPtr2=0xff
  F15TnGetFrequencyXlatRegInfo - PstateNumber=2, Frequency=3900
  F15TnGetPstateFrequency - P2
    FrequencyInMHz=3900, CpuFid=23, CpuDid=0
  CpuFidPtr=23, CpuDidPtr1=0x0, CpuDidPtr2=0xffff
  F15TnGetPowerStepValueInTime
  PowerStepPtr=50
  F15TnGetPowerStepValueInTime
  PowerStepPtr=50
  F15TnGetPllValueInTime
    PllLockTimePtr=2
  F15TnIsPstatePsdDependent
    P-state PSD is dependent: 1
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
  F15TnGetPstateTransLatency
  F15TnGetFrequencyXlatRegInfo - PstateNumber=0, Frequency=0
  F15TnGetPstateFrequency - P0
    FrequencyInMHz=4100, CpuFid=25, CpuDid=0
  CpuFidPtr=255, CpuDidPtr1=0xff, CpuDidPtr2=0xff
  F15TnGetFrequencyXlatRegInfo - PstateNumber=2, Frequency=3900
  F15TnGetPstateFrequency - P2
    FrequencyInMHz=3900, CpuFid=23, CpuDid=0
  CpuFidPtr=23, CpuDidPtr1=0x0, CpuDidPtr2=0xffff
  F15TnGetPowerStepValueInTime
  PowerStepPtr=50
  F15TnGetPowerStepValueInTime
  PowerStepPtr=50
  F15TnGetPllValueInTime
    PllLockTimePtr=2
  F15TnIsPstatePsdDependent
    P-state PSD is dependent: 1
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 
'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
  WHEA is created
CreatSystemTable: End
DispatchCpuFeatures: LateStart
DispatchCpuFeatures: LateEnd
AmdCpuLate: Start
AmdCpuLate: End
PcieAlibBuildAcpiTable Enter
PcieAlibUpdatePcieMmioInfo Enter
PcieAlibUpdatePcieMmioInfo Exit
PcieAlibBuildAcpiTable Exit [0x0]
GnbIommuScratchMemoryRangeInterface Enter
Set Iommu Scratch Memory for Socket 0 Silicon 0
  S3 Save: PCI WR Address: 0x00000094 Data: 0x00000127
  S3 Save: PCI WR Address: 0x00000098 Data: 0x10011040
  S3 Save: PCI WR Address: 0x00000094 Data: 0x00000126
  S3 Save: PCI WR Address: 0x00000098 Data: 0x00000000
GnbIommuScratchMemoryRangeInterface Exit
Build IVRS for Socket 0 Silicon 0
GnbFmCreateIvrsEntry Entry
SbCreateIvhdEntries Entry
SbCreateIvhdEntries Exit
GnbFmCreateIvrsEntry Exit
GnbBuildIvmdList Entry
GnbBuildIvmdList Exit
<----------  IVRS Table Start ----------->
  IVInfo           = 0x00202840
  <-------------IVHD Block Start -------->
  Flags            = 0xfe
  DeviceId         = 0x0002
  CapabilityOffset = 0x40
  BaseAddress      = 0x00000000f0100000
  PCI Segment      = 0x0000
  IommuInfo        = 0x1300
  IommuEfr         = 0x00048824
  <-------------IVHD Block Device Entries Start -------->
  03 08 00 00 04 fe ff 00
  43 00 01 00 00 a4 00 00 04 ff 01 00
    48 00 00 00 00 a0 00 02
  48 00 00 d7 04 a0 00 01
  <-------------IVHD Block Device Entries End -------->
  <-------------IVHD Block End ---------->
<----------  IVRS Table Raw Data -------->
49 56 52 53 70 00 00 00 02 6b 41 4d 44 20 20 00
41 4d 44 49 4f 4d 4d 55 01 00 00 00 41 4d 44 20
00 00 00 00 40 28 20 00 00 00 00 00 00 00 00 00
10 fe 40 00 02 00 40 00 00 00 10 f0 00 00 00 00
00 00 00 13 24 88 04 00 03 08 00 00 04 fe ff 00
43 00 01 00 00 a4 00 00 04 ff 01 00 00 00 00 00
48 00 00 00 00 a0 00 02 48 00 00 d7 04 a0 00 01

<----------  IVRS Table End ------------->

AmdInitLate: End

AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdInitLate [00020004]

APIC 00: ** Enter AmdS3Save [0002000b]
GfxInitSview Enter
  S3 Save: PCI WR Address: 0x00008004 Data: 0x07
FMAP: area COREBOOT found @ 200 (8388096 bytes)
CBFS: Locating 'pci1002,9996.rom'
CBFS: Found @ offset 2440 size f200
  S3 Save: PCI WR Address: 0x00008004 Data: 0x07
GfxInitSview Exit [0x0]
  FchInitLate Enter...
  FchInitLate Exit... Status = [0x0]
Manufacturer: ef
SF: Detected ef 4017 with sector size 0x1000, total 0x800000
SF: Successfully erased 4096 bytes @ 0xffff1000
Manufacturer: ef
SF: Detected ef 4017 with sector size 0x1000, total 0x800000
SF: Successfully erased 4096 bytes @ 0xffff0000
AmdS3Save() returned AGESA_SUCCESS
ASSERTION ERROR: file 'src/drivers/amd/agesa/state_machine.c', line 279
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdS3Save [0002000b]
BS: BS_POST_DEVICE exit times (exec / console): 15 / 226 ms
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0x5fe6c000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 0x000f0410 - 0x000f05dc
Wrote the mp table end at: 0x5fe6b010 - 0x5fe6b1dc
MP table: 476 bytes.
FMAP: area COREBOOT found @ 200 (8388096 bytes)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 500 size 19e4
FMAP: area COREBOOT found @ 200 (8388096 bytes)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 5fe47000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
FMAP: area COREBOOT found @ 200 (8388096 bytes)
CBFS: Locating 'pci1002,9996.rom'
CBFS: Found @ offset 2440 size f200
In CBFS, ROM address for PCI: 00:01.0 = 0xff802688
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01c0
PCI ROM image, vendor ID 1002, device ID 9996,
PCI ROM image, Class Code 030000, Code Type 00
PCI: 00:01.0: Missing ACPI scope
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI:    * MADT
ACPI: added table 3/32, length now 48
current = 5fe48e90
FMAP: area COREBOOT found @ 200 (8388096 bytes)
CBFS: Locating 'pci1002,9996.rom'
CBFS: Found @ offset 2440 size f200
In CBFS, ROM address for PCI: 00:01.0 = 0xff802688
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01c0
PCI ROM image, vendor ID 1002, device ID 9996,
PCI ROM image, Class Code 030000, Code Type 00
           Copying VBIOS image from 0xff802688
ACPI:    * VFCT at 5fe48e90
ACPI: added table 4/32, length now 52
ACPI:    * HPET
ACPI: added table 5/32, length now 56
ACPI: added table 6/32, length now 60
ACPI:    * IVRS at 5fe58310
ACPI: added table 7/32, length now 64
ACPI:    * SRAT at 5fe58380
  AGESA SRAT table NULL. Skipping.
ACPI:   * SLIT at 5fe58380
  AGESA SLIT table NULL. Skipping.
ACPI:  * AGESA ALIB SSDT at 5fe58380
ACPI: added table 8/32, length now 68
ACPI:    * SSDT at 5fe588a0
ACPI: added table 9/32, length now 72
ACPI:    * SSDT for PState at 5fe58f52
ACPI: done.
ACPI tables: 73568 bytes.
smbios_write_tables: 5fe46000
SMBIOS firmware version is set to coreboot_version: 
'4.12-3297-g85428b151f-dirty'
SMBIOS tables: 577 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum cff7
Writing coreboot table at 0x5fe6d000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000005fe45fff: RAM
 3. 000000005fe46000-000000005fea5fff: CONFIGURATION TABLES
 4. 000000005fea6000-000000005ffbafff: RAMSTAGE
 5. 000000005ffbb000-000000005fffffff: CONFIGURATION TABLES
 6. 0000000060000000-000000007fffffff: RESERVED
 7. 00000000f8000000-00000000fbffffff: RESERVED
 8. 0000000100000000-000000017effffff: RAM
Manufacturer: ef
SF: Detected ef 4017 with sector size 0x1000, total 0x800000
FMAP: area COREBOOT found @ 200 (8388096 bytes)
Wrote coreboot table at: 0x5fe6d000, 0x308 bytes, checksum 8eea
coreboot table: 800 bytes.
IMD ROOT    0. 0x5ffff000 0x00001000
IMD SMALL   1. 0x5fffe000 0x00001000
CONSOLE     2. 0x5ffde000 0x00020000
TIME STAMP  3. 0x5ffdd000 0x00000910
ROMSTG STCK 4. 0x5ffc5000 0x00018000
AFTER CAR   5. 0x5ffbb000 0x0000a000
RAMSTAGE    6. 0x5fea5000 0x00116000
ACPISCRATCH 7. 0x5fe75000 0x00030000
COREBOOT    8. 0x5fe6d000 0x00008000
IRQ TABLE   9. 0x5fe6c000 0x00001000
SMP TABLE  10. 0x5fe6b000 0x00001000
ACPI       11. 0x5fe47000 0x00024000
SMBIOS     12. 0x5fe46000 0x00000800
IMD small region:
  IMD ROOT    0. 0x5fffec00 0x00000400
  FMAP        1. 0x5fffeb40 0x000000b6
  ROMSTAGE    2. 0x5fffeb20 0x00000004
BS: BS_WRITE_TABLES run times (exec / console): 10 / 165 ms
FMAP: area COREBOOT found @ 200 (8388096 bytes)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset a9680 size 1120d
Checking segment from ROM address 0xff8a98b8
Checking segment from ROM address 0xff8a98d4
Loading segment from ROM address 0xff8a98b8
  code (compression=1)
  New segment dstaddr 0x000df8c0 memsize 0x20740 srcaddr 0xff8a98f0 filesize 
0x111d5
Loading Segment: addr: 0x000df8c0 memsz: 0x0000000000020740 filesz: 
0x00000000000111d5
using LZMA
[ 0x000df8c0, 00100000, 0x00100000) <- ff8a98f0
Loading segment from ROM address 0xff8a98d4
  Entry Point 0x000fd270
Loaded segments
BS: BS_PAYLOAD_LOAD run times (exec / console): 14 / 26 ms
Jumping to boot code at 0x000fd270(0x5fe6d000)
CPU0: stack: 0x5fef4000 - 0x5fef5000, lowest used address 0x5fef455c, stack 
used: 2724 bytes
SeaBIOS (version rel-1.14.0-8-gc685fe3)
BUILD: gcc: (Debian 10.2.0-15) 10.2.0 binutils: (GNU Binutils for Debian) 2.35.1
SeaBIOS (version rel-1.14.0-8-gc685fe3)
BUILD: gcc: (Debian 10.2.0-15) 10.2.0 binutils: (GNU Binutils for Debian) 2.35.1
Found coreboot cbmem console @ 5ffde000
Found mainboard ASUS F2A85-M_PRO
Relocating init from 0x000e1000 to 0x5fdf8b60 (size 54272)
Found CBFS header at 0xff800238
multiboot: eax=5feebd40, ebx=5feebd04
Found 25 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0x5fe46000 to 0x000f6300
Copying ACPI RSDP from 0x5fe47000 to 0x000f62d0
Copying MPTABLE from 0x5fe6b000/5fe6b010 to 0x000f60f0
Copying PIR from 0x5fe6c000 to 0x000f60c0
table(50434146)=0x5fe48c70 (via xsdt)
Using pmtimer, ioport 0x818
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.14.0-8-gc685fe3)
PCI: XHCI at 00:10.0 (mmio 0xf01c8000)
XHCI init: regs @ 0xf01c8000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ 0xf01c8500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 0
PCI: XHCI at 00:10.1 (mmio 0xf01ca000)
XHCI init: regs @ 0xf01ca000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ 0xf01ca500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 0
PCI: XHCI at 03:00.0 (mmio 0xf0000000)
XHCI init: regs @ 0xf0000000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ 0xf0000800
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 1
EHCI init on dev 00:12.2 (regs=0xf01d0020)
EHCI init on dev 00:13.2 (regs=0xf01d1020)
OHCI init on dev 00:12.0 (regs=0xf01cc000)
OHCI init on dev 00:13.0 (regs=0xf01cd000)
OHCI init on dev 00:14.5 (regs=0xf01ce000)
AHCI controller at 00:11.0, iobase 0xf01cf000, irq 0
Searching bootorder for: HALT
Found 0 lpt ports
Found 1 serial ports
Searching bootorder for: /pci@i0cf8/*@11/drive@6/disk@0
AHCI/6: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@11/drive@6/disk@0
AHCI/6: registering: "AHCI/6: SanDisk SDSSDP064G ATA-9 Hard-Disk (61057 
MiBytes)"
USB mouse initialized
XHCI no devices found
PS2 keyboard initialized
WARNING - Timeout at wait_bit:302!
WARNING - Timeout at wait_bit:302!
All threads complete.
Scan for option roms

Press ESC for boot menu.

Select boot device:

1. AHCI/6: SanDisk SDSSDP064G ATA-9 Hard-Disk (61057 MiBytes)
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