Hi Anatolii. The debug version of FSP is a separate build of the FSP binary which is hard to get other than from Intel. In addition, the debug versions of the FSP I ever had my hands on were not able to pass DRAM init in FSP-M.
If you, contrary, simply enable UART log in the non-debug FSP binary (over UPD), then there will be not much information as in a non-debug build Intel has removed the most outputs from the image. Can you tell us a bit more about your setup? Which mainboard? Do you have a coreboot-log around? Werner Von: Anatolii Vorobev <[email protected]> Gesendet: Donnerstag, 10. Dezember 2020 15:56 An: [email protected] Betreff: [coreboot] FSP debug binaries Dear Commutinty, How can one get debug UART log from Intel FSP for Apollo Lake SoC (e3950 in particular)? There is software requirement in #573449 document (section 4.2.1) that states: "In order to enable the debug message output over serial UART port, the debug version Intel(r) FSP need to be integrated into the BIOS binary...". I cannot find any reference to debug version of Intel FSP. Intel community forums are useless with such questions. Do I really need this mysterious debug version of APL Intel FSP binaries or should I just enable debug log in UPD settings of FSP being fetched from git during coreboot build process? I have a problem passing SiliconInit of FSP-S module. It's just getting stuck without any error message after invoking FSP-S module. The problem is in UPD settings for FSP-S, I just want to know where exactly. Best Regards, Anatolii Vorobev
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