On 22.03.22 12:01, Mariusz Szafrański via coreboot wrote: >> At some point of time I was thinking about something called >> "subdomains" concept to cover this multiple root buses in one >> domain case so to make something like: >> >> domain 0 //domain >> domain 1 //subdomain >> first root bus from stack x and its downstream devices >> end >> domain 2 //subdomain >> second root bus from stack x and its downstream devices >> end >> end >> domain ... >> ... >> end >> ... >> >> >> T8he way I understood it, domains are a set of resource windows to be >> constrained and then distributed over children and in this case >> children over multiple PCI root busses. >> I have some doubts that subdomains map the situation >> correctly/efficiently, because it has essentially the same problem as >> knowing how to split the resources between domains correctly. > As I stated it was never implemented as subdomain level device is more a > "bridge device" than "domain device"
This sounds much like my idea to have device nodes for the PCI host bridges :) I believe it's the right way to model the hierarchy. Having these nodes might also make it easier to map things to ACPI. >> >> OTOH, does it even make sense to map this in the devicetree? The way >> FSP reports stacks is generated at runtime and differs depending on >> the hardware configuration. >> So having a static structure mapping that may not be interesting? >> >> Arthur >> > It depends if few ms in boot time does matter. Do you mean us? or are the HOBs that huge? Nico _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
