Issue #608 has been updated by Patrick Rudolph.
x86 exception 2 seems to be related to a NMI. The code in the stacktrace seems to be not related to the NMI iteself. Case 1) You have set up an watchdog that triggers the NMI? Case 2) A hardware error occured. The memory or the CPU isn't working as it should, causing this issue. ---------------------------------------- Bug #608: Intel D510 (Pineview) CPU Index 0 - APIC 0 Unexpected Exception:2 @ 08:7f2a67d1 - Halting https://ticket.coreboot.org/issues/608#change-2138 * Author: David Duchesne * Status: New * Priority: Normal * Target version: none * Start date: 2025-09-07 * Related links: [NOTE ] coreboot-25.06-9fe1546ffe Mon Jul 07 10:54:51 UTC 2025 x86_32 bootblock starting (log level: 7)... [INFO ] Timestamp - end of bootblock: 32009410 [INFO ] Timestamp - starting to load romstage: 40249380 [DEBUG] FMAP: Found "FLASH" version 1.1 at 0x100000. [DEBUG] FMAP: base = 0x0 size = 0x1000000 #areas = 3 [DEBUG] FMAP: area COREBOOT found @ 100200 (15728128 bytes) [INFO ] CBFS: mcache @0xfefc2e00 built for 19 files, used 0x3b4 of 0x4000 bytes [INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0xd2f0 in mcache @0xfefc2e2c [INFO ] Timestamp - finished loading romstage: 107933420 [DEBUG] BS: bootblock times (exec / console): total (unknown) / 60 ms [NOTE ] coreboot-25.06-9fe1546ffe Mon Jul 07 10:54:51 UTC 2025 x86_32 romstage starting (log level: 7)... [DEBUG] SMBus controller enabled [DEBUG] Setting up static southbridge registers... done. [DEBUG] Disabling Watchdog reboot... done. [DEBUG] Intel Pineview northbridge [DEBUG] Setting up static northbridge registers... done. [DEBUG] Initializing memory [INFO ] Timestamp - before RAM initialization: 203355730 [DEBUG] Boot path: Normal [DEBUG] 0xfefc1aa0: 80 08 08 0e 0a 61 40 00 05 25 40 00 82 08 00 00 .....a@..%@..... [DEBUG] 0xfefc1ab0: 0c 08 30 01 02 00 07 3d 50 50 60 32 1e 32 25 01 ..0....=PP`2.2%. [DEBUG] 0xfefc1ac0: 17 25 05 12 3c 1e 1e 00 06 3c 7f 80 14 1e 00 00 .%..<....<...... [DEBUG] 0xfefc1ad0: 00 03 00 00 00 00 00 00 00 00 00 00 00 00 12 c3 ................ [DEBUG] 0xfefc1be8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ [DEBUG] ... [DEBUG] Total memory = 2048MB [DEBUG] GGC = 0x0130 [DEBUG] GBSM (igd) = verified 7f800000 (written 7f800000) [DEBUG] BGSM (gtt) = verified 7f700000 (written 7f700000) [DEBUG] TSEG (smm) = verified 7f600000 (written 7f600000) [DEBUG] RAM initialization finished. [INFO ] Timestamp - after RAM initialization: 456308720 [DEBUG] Memory initialized [DEBUG] CBMEM: [DEBUG] IMD: root @ 0x7f3ff000 254 entries. [DEBUG] IMD: root @ 0x7f3fec00 62 entries. [DEBUG] External stage cache: [DEBUG] IMD: root @ 0x7f6ff000 254 entries. [DEBUG] IMD: root @ 0x7f6fec00 62 entries. [DEBUG] SMM Memory Map [DEBUG] SMRAM : 0x7f600000 0x100000 [DEBUG] Subregion 0: 0x7f600000 0x80000 [DEBUG] Subregion 1: 0x7f680000 0x80000 [DEBUG] Subregion 2: 0x7f700000 0x0 [DEBUG] Normal boot [INFO ] CBFS: Found 'fallback/postcar' @0x2d740 size 0x89e8 in mcache @0xfefc3034 [DEBUG] Loading module at 0x7f3cd000 with entry 0x7f3cd031. filesize: 0x8148 memsize: 0xe498 [DEBUG] Processing 536 relocs. Offset value of 0x7d3cd000 [INFO ] Timestamp - end of romstage: 626016100 [DEBUG] BS: romstage times (exec / console): total (unknown) / 198 ms [NOTE ] coreboot-25.06-9fe1546ffe Mon Jul 07 10:54:51 UTC 2025 x86_32 postcar starting (log level: 7)... [INFO ] Timestamp - start of postcar: 665484600 [INFO ] Timestamp - end of postcar: 673831930 [DEBUG] Normal boot [INFO ] Timestamp - starting to load ramstage: 686222860 [INFO ] CBFS: Found 'fallback/ramstage' @0xd400 size 0x15812 in mcache @0x7f3dd08c [INFO ] Timestamp - starting LZMA decompress (ignore for x86): 709278150 [INFO ] Timestamp - finished LZMA decompress (ignore for x86): 828909740 [DEBUG] Loading module at 0x7f294000 with entry 0x7f294000. filesize: 0x2b178 memsize: 0x137c30 [DEBUG] Processing 3232 relocs. Offset value of 0x7b294000 [INFO ] Timestamp - finished loading ramstage: 866463700 [DEBUG] BS: postcar times (exec / console): total (unknown) / 71 ms [NOTE ] coreboot-25.06-9fe1546ffe Mon Jul 07 10:54:51 UTC 2025 x86_32 ramstage starting (log level: 7)... [INFO ] Timestamp - start of ramstage: 906512580 [DEBUG] Normal boot [INFO ] Timestamp - early chipset initialization: 919331960 [DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 0 / 6 ms [INFO ] Timestamp - device enumeration: 940505000 [INFO ] Enumerating buses... [DEBUG] Root Device scanning... [DEBUG] CPU_CLUSTER: 0 enabled [DEBUG] DOMAIN: 00000000 enabled [DEBUG] DOMAIN: 00000000 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 00 [DEBUG] PCI: 00:00:00.0 [8086/a000] enabled [DEBUG] PCI: 00:00:02.0 [8086/a001] enabled [DEBUG] PCI: 00:00:02.1 [8086/a002] enabled [DEBUG] PCI: 00:00:1b.0 [8086/27d8] enabled [DEBUG] PCI: 00:00:1c.0 [8086/27d0] enabled [DEBUG] PCI: 00:00:1c.1 [8086/27d2] enabled [DEBUG] PCI: 00:00:1c.2 [8086/27d4] enabled [DEBUG] PCI: 00:00:1c.3 [8086/27d6] enabled [DEBUG] PCI: 00:00:1d.0 [8086/27c8] enabled [DEBUG] PCI: 00:00:1d.1 [8086/27c9] enabled [DEBUG] PCI: 00:00:1d.2 [8086/27ca] enabled [DEBUG] PCI: 00:00:1d.3 [8086/27cb] enabled [DEBUG] PCI: 00:00:1d.7 [8086/27cc] enabled [DEBUG] PCI: 00:00:1e.0 [8086/2448] enabled [DEBUG] PCI: 00:00:1f.0 [8086/27bc] enabled [DEBUG] PCI: 00:00:1f.1: Disabling device [DEBUG] Set SATA mode early [DEBUG] Set SATA mode early [DEBUG] PCI: 00:00:1f.2 [8086/27c1] enabled [DEBUG] PCI: 00:00:1f.3 [8086/27da] enabled [DEBUG] PCI: 00:00:1f.4: Disabling device [DEBUG] PCI: 00:00:1f.5: Disabling device [DEBUG] PCI: 00:00:1f.6: Disabling device [WARN ] PCI: Leftover static devices: [WARN ] PCI: 00:00:1f.1 [WARN ] PCI: 00:00:1f.4 [WARN ] PCI: 00:00:1f.5 [WARN ] PCI: 00:00:1f.6 [WARN ] PCI: Check your devicetree.cb. [DEBUG] PCI: 00:00:1c.0 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 01 [DEBUG] PCI: 00:01:00.0 [10ec/8168] enabled [DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 10 msecs [DEBUG] PCI: 00:00:1c.1 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 02 [DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 5 msecs [DEBUG] PCI: 00:00:1c.2 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 03 [DEBUG] scan_bus: bus PCI: 00:00:1c.2 finished in 5 msecs [DEBUG] PCI: 00:00:1c.3 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 04 [DEBUG] scan_bus: bus PCI: 00:00:1c.3 finished in 5 msecs [DEBUG] PCI: 00:00:1e.0 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 05 [DEBUG] scan_bus: bus PCI: 00:00:1e.0 finished in 5 msecs [DEBUG] PCI: 00:00:1f.0 scanning... [DEBUG] PNP: 004e.0 disabled [DEBUG] PNP: 004e.1 enabled [DEBUG] PNP: 004e.2 enabled [DEBUG] PNP: 004e.3 enabled [DEBUG] PNP: 004e.5 enabled [DEBUG] PNP: 004e.6 disabled [DEBUG] PNP: 004e.7 disabled [DEBUG] PNP: 004e.8 disabled [DEBUG] PNP: 004e.9 disabled [DEBUG] PNP: 004e.a disabled [DEBUG] PNP: 004e.b enabled [DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 35 msecs [DEBUG] PCI: 00:00:1f.3 scanning... [DEBUG] I2C: 01:69 enabled [DEBUG] bus: PCI: 00:00:1f.3->scan_bus: bus PCI: 00:00:1f.3 finished in 6 msecs [DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 268 msecs [DEBUG] scan_bus: bus Root Device finished in 285 msecs [INFO ] done [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 305 ms [INFO ] Timestamp - device configuration: 1470442510 [DEBUG] found VGA at PCI: 00:00:02.0 [DEBUG] Setting up VGA for PCI: 00:00:02.0 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device [INFO ] Allocating resources... [INFO ] Reading resources... [DEBUG] TOUUD 0x80000000 TOLUD 0x80000000 TOM 0x100000000 8M UMA and 1M GTT [DEBUG] Unused RAM between cbmem_top and TOM: 0x200000 [DEBUG] Adding PCIe enhanced config space BAR 0xe0000000-0xf0000000. [INFO ] Done reading resources. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) === [DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff [DEBUG] PCI: 00:01:00.0 10 * [0x0 - 0xff] io [DEBUG] PCI: 00:00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done [DEBUG] PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff [DEBUG] PCI: 00:01:00.0 30 * [0x0 - 0x1ffff] mem [DEBUG] PCI: 00:00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done [DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff [DEBUG] PCI: 00:01:00.0 20 * [0x0 - 0x3fff] prefmem [DEBUG] PCI: 00:01:00.0 18 * [0x4000 - 0x4fff] prefmem [DEBUG] PCI: 00:00:1c.0 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffff done [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) === [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) [DEBUG] avoid_fixed_resources: PNP: 004e.1 60 base 00000378 limit 0000037f io (fixed) [DEBUG] avoid_fixed_resources: PNP: 004e.2 60 base 000003f8 limit 000003ff io (fixed) [DEBUG] avoid_fixed_resources: PNP: 004e.3 60 base 000002f8 limit 000002ff io (fixed) [DEBUG] avoid_fixed_resources: PNP: 004e.5 60 base 00000060 limit 00000060 io (fixed) [DEBUG] avoid_fixed_resources: PNP: 004e.5 62 base 00000064 limit 00000064 io (fixed) [DEBUG] avoid_fixed_resources: PNP: 004e.b 60 base 00000290 limit 00000297 io (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed) [INFO ] DOMAIN: 00000000: Resource ranges: [INFO ] * Base: 1000, Size: f000, Tag: 100 [DEBUG] PCI: 00:00:1c.0 1c * [0xf000 - 0xffff] limit: ffff io [DEBUG] PCI: 00:00:1d.0 20 * [0xefe0 - 0xefff] limit: efff io [DEBUG] PCI: 00:00:1d.1 20 * [0xefc0 - 0xefdf] limit: efdf io [DEBUG] PCI: 00:00:1d.2 20 * [0xefa0 - 0xefbf] limit: efbf io [DEBUG] PCI: 00:00:1d.3 20 * [0xef80 - 0xef9f] limit: ef9f io [DEBUG] PCI: 00:00:1f.2 20 * [0xef60 - 0xef7f] limit: ef7f io [DEBUG] PCI: 00:00:02.0 14 * [0xef58 - 0xef5f] limit: ef5f io [DEBUG] PCI: 00:00:1f.2 10 * [0xef50 - 0xef57] limit: ef57 io [DEBUG] PCI: 00:00:1f.2 18 * [0xef48 - 0xef4f] limit: ef4f io [DEBUG] PCI: 00:00:1f.2 14 * [0xef44 - 0xef47] limit: ef47 io [DEBUG] PCI: 00:00:1f.2 1c * [0xef40 - 0xef43] limit: ef43 io [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done [DEBUG] DOMAIN: 00000000 mem: base: 7f400000 size: 0 align: 0 gran: 0 limit: febfffff [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 03 base 00000000 limit 0009ffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 04 base 00100000 limit 7f3fffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 05 base 7f600000 limit 7f6fffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 06 base 7f700000 limit 7f7fffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 07 base 7f800000 limit 7fffffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 08 base 7f400000 limit 7f5fffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0a base e0000000 limit efffffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0b base fed00000 limit fedfffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0c base 000a0000 limit 000bffff mem (fixed) [DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0d base 000c0000 limit 000fffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base ff800000 limit ffffffff mem (fixed) [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed) [INFO ] DOMAIN: 00000000: Resource ranges: [INFO ] * Base: 80000000, Size: 60000000, Tag: 200 [INFO ] * Base: f0000000, Size: ec00000, Tag: 200 [INFO ] * Base: 100000000, Size: f00000000, Tag: 200 [DEBUG] PCI: 00:00:02.0 18 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem [DEBUG] PCI: 00:00:02.0 1c * [0xfeb00000 - 0xfebfffff] limit: febfffff mem [DEBUG] PCI: 00:00:1c.0 24 * [0xfea00000 - 0xfeafffff] limit: feafffff prefmem [DEBUG] PCI: 00:00:1c.0 20 * [0xfe900000 - 0xfe9fffff] limit: fe9fffff mem [DEBUG] PCI: 00:00:02.0 10 * [0xfe880000 - 0xfe8fffff] limit: fe8fffff mem [DEBUG] PCI: 00:00:02.1 10 * [0xfe800000 - 0xfe87ffff] limit: fe87ffff mem [DEBUG] PCI: 00:00:1b.0 10 * [0xfe7fc000 - 0xfe7fffff] limit: fe7fffff mem [DEBUG] PCI: 00:00:1d.7 10 * [0xfe7fb000 - 0xfe7fb3ff] limit: fe7fb3ff mem [DEBUG] PCI: 00:00:1f.2 24 * [0xfe7fa000 - 0xfe7fa3ff] limit: fe7fa3ff mem [DEBUG] DOMAIN: 00000000 mem: base: 7f400000 size: 0 align: 0 gran: 0 limit: febfffff done [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done [DEBUG] PCI: 00:01:00.0 10 * [0xf000 - 0xf0ff] limit: f0ff io [DEBUG] PCI: 00:01:00.0 18 * [0xfea04000 - 0xfea04fff] limit: fea04fff prefmem [DEBUG] PCI: 00:01:00.0 20 * [0xfea00000 - 0xfea03fff] limit: fea03fff prefmem [DEBUG] PCI: 00:01:00.0 30 * [0xfe900000 - 0xfe91ffff] limit: fe91ffff mem [INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete === [DEBUG] DOMAIN: 00000000 03 <- [0x0000000000000000 - 0x000000000009ffff] size 0x000a0000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 04 <- [0x0000000000100000 - 0x000000007f3fffff] size 0x7f300000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 05 <- [0x000000007f600000 - 0x000000007f6fffff] size 0x00100000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 06 <- [0x000000007f700000 - 0x000000007f7fffff] size 0x00100000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 07 <- [0x000000007f800000 - 0x000000007fffffff] size 0x00800000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 08 <- [0x000000007f400000 - 0x000000007f5fffff] size 0x00200000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 0a <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 0b <- [0x00000000fed00000 - 0x00000000fedfffff] size 0x00100000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 0c <- [0x00000000000a0000 - 0x00000000000bffff] size 0x00020000 gran 0x00 mem [DEBUG] DOMAIN: 00000000 0d <- [0x00000000000c0000 - 0x00000000000fffff] size 0x00040000 gran 0x00 mem [DEBUG] PCI: 00:00:02.0 10 <- [0x00000000fe880000 - 0x00000000fe8fffff] size 0x00080000 gran 0x13 mem [DEBUG] PCI: 00:00:02.0 14 <- [0x000000000000ef58 - 0x000000000000ef5f] size 0x00000008 gran 0x03 io [DEBUG] PCI: 00:00:02.0 18 <- [0x00000000d0000000 - 0x00000000dfffffff] size 0x10000000 gran 0x1c prefmem [DEBUG] PCI: 00:00:02.0 1c <- [0x00000000feb00000 - 0x00000000febfffff] size 0x00100000 gran 0x14 mem [DEBUG] PCI: 00:00:02.1 10 <- [0x00000000fe800000 - 0x00000000fe87ffff] size 0x00080000 gran 0x13 mem [DEBUG] PCI: 00:00:1b.0 10 <- [0x00000000fe7fc000 - 0x00000000fe7fffff] size 0x00004000 gran 0x0e mem64 [DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000f000 - 0x000000000000ffff] size 0x00001000 gran 0x0c seg 00 bus 01 io [DEBUG] PCI: 00:00:1c.0 24 <- [0x00000000fea00000 - 0x00000000feafffff] size 0x00100000 gran 0x14 seg 00 bus 01 prefmem [DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000fe900000 - 0x00000000fe9fffff] size 0x00100000 gran 0x14 seg 00 bus 01 mem [DEBUG] PCI: 00:01:00.0 10 <- [0x000000000000f000 - 0x000000000000f0ff] size 0x00000100 gran 0x08 io [DEBUG] PCI: 00:01:00.0 18 <- [0x00000000fea04000 - 0x00000000fea04fff] size 0x00001000 gran 0x0c prefmem64 [DEBUG] PCI: 00:01:00.0 20 <- [0x00000000fea00000 - 0x00000000fea03fff] size 0x00004000 gran 0x0e prefmem64 [DEBUG] PCI: 00:01:00.0 30 <- [0x00000000fe900000 - 0x00000000fe91ffff] size 0x00020000 gran 0x11 romem [DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io [DEBUG] PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem [DEBUG] PCI: 00:00:1c.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 mem [DEBUG] PCI: 00:00:1c.2 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 03 io [DEBUG] PCI: 00:00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem [DEBUG] PCI: 00:00:1c.2 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 mem [DEBUG] PCI: 00:00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 04 io [DEBUG] PCI: 00:00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 04 prefmem [DEBUG] PCI: 00:00:1c.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 04 mem [DEBUG] PCI: 00:00:1d.0 20 <- [0x000000000000efe0 - 0x000000000000efff] size 0x00000020 gran 0x05 io [DEBUG] PCI: 00:00:1d.1 20 <- [0x000000000000efc0 - 0x000000000000efdf] size 0x00000020 gran 0x05 io [DEBUG] PCI: 00:00:1d.2 20 <- [0x000000000000efa0 - 0x000000000000efbf] size 0x00000020 gran 0x05 io [DEBUG] PCI: 00:00:1d.3 20 <- [0x000000000000ef80 - 0x000000000000ef9f] size 0x00000020 gran 0x05 io [DEBUG] PCI: 00:00:1d.7 10 <- [0x00000000fe7fb000 - 0x00000000fe7fb3ff] size 0x00000400 gran 0x0a mem [DEBUG] PCI: 00:00:1e.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 05 io [DEBUG] PCI: 00:00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 prefmem [DEBUG] PCI: 00:00:1e.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 mem [DEBUG] PNP: 004e.1 60 <- [0x0000000000000378 - 0x000000000000037f] size 0x00000008 gran 0x03 io [DEBUG] PNP: 004e.1 70 <- [0x0000000000000007 - 0x0000000000000007] size 0x00000001 gran 0x00 irq [DEBUG] PNP: 004e.1 74 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 drq [DEBUG] PNP: 004e.2 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io [DEBUG] PNP: 004e.2 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq [DEBUG] PNP: 004e.3 60 <- [0x00000000000002f8 - 0x00000000000002ff] size 0x00000008 gran 0x03 io [DEBUG] PNP: 004e.3 70 <- [0x0000000000000003 - 0x0000000000000003] size 0x00000001 gran 0x00 irq [DEBUG] PNP: 004e.3 f1 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq [DEBUG] PNP: 004e.5 60 <- [0x0000000000000060 - 0x0000000000000060] size 0x00000001 gran 0x00 io [DEBUG] PNP: 004e.5 62 <- [0x0000000000000064 - 0x0000000000000064] size 0x00000001 gran 0x00 io [DEBUG] PNP: 004e.5 70 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 irq [DEBUG] PNP: 004e.5 72 <- [0x000000000000000c - 0x000000000000000c] size 0x00000001 gran 0x00 irq [DEBUG] PNP: 004e.5 f0 <- [0x0000000000000080 - 0x0000000000000080] size 0x00000001 gran 0x00 irq [DEBUG] PNP: 004e.b 60 <- [0x0000000000000290 - 0x0000000000000297] size 0x00000008 gran 0x03 io [DEBUG] PNP: 004e.b 70 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq [DEBUG] PCI: 00:00:1f.2 10 <- [0x000000000000ef50 - 0x000000000000ef57] size 0x00000008 gran 0x03 io [DEBUG] PCI: 00:00:1f.2 14 <- [0x000000000000ef44 - 0x000000000000ef47] size 0x00000004 gran 0x02 io [DEBUG] PCI: 00:00:1f.2 18 <- [0x000000000000ef48 - 0x000000000000ef4f] size 0x00000008 gran 0x03 io [DEBUG] PCI: 00:00:1f.2 1c <- [0x000000000000ef40 - 0x000000000000ef43] size 0x00000004 gran 0x02 io [DEBUG] PCI: 00:00:1f.2 20 <- [0x000000000000ef60 - 0x000000000000ef7f] size 0x00000020 gran 0x05 io [DEBUG] PCI: 00:00:1f.2 24 <- [0x00000000fe7fa000 - 0x00000000fe7fa3ff] size 0x00000400 gran 0x0a mem [INFO ] Done setting resources. [INFO ] Done allocating resources. [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 1 / 1164 ms [INFO ] Timestamp - device enable: 3463231870 [INFO ] Enabling resources... [DEBUG] PCI: 00:00:00.0 subsystem <- 8086/a000 [DEBUG] PCI: 00:00:00.0 cmd <- 06 [DEBUG] PCI: 00:00:02.0 subsystem <- 8086/a001 [DEBUG] PCI: 00:00:02.0 cmd <- 03 [DEBUG] PCI: 00:00:02.1 subsystem <- 8086/a002 [DEBUG] PCI: 00:00:02.1 cmd <- 02 [DEBUG] PCI: 00:00:1b.0 subsystem <- 8086/27d8 [DEBUG] PCI: 00:00:1b.0 cmd <- 102 [DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1c.0 subsystem <- 8086/27d0 [DEBUG] PCI: 00:00:1c.0 cmd <- 107 [DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1c.1 subsystem <- 8086/27d2 [DEBUG] PCI: 00:00:1c.1 cmd <- 100 [DEBUG] PCI: 00:00:1c.2 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1c.2 subsystem <- 8086/27d4 [DEBUG] PCI: 00:00:1c.2 cmd <- 100 [DEBUG] PCI: 00:00:1c.3 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1c.3 subsystem <- 8086/27d6 [DEBUG] PCI: 00:00:1c.3 cmd <- 100 [DEBUG] PCI: 00:00:1d.0 subsystem <- 8086/27c8 [DEBUG] PCI: 00:00:1d.0 cmd <- 01 [DEBUG] PCI: 00:00:1d.1 subsystem <- 8086/27c9 [DEBUG] PCI: 00:00:1d.1 cmd <- 01 [DEBUG] PCI: 00:00:1d.2 subsystem <- 8086/27ca [DEBUG] PCI: 00:00:1d.2 cmd <- 01 [DEBUG] PCI: 00:00:1d.3 subsystem <- 8086/27cb [DEBUG] PCI: 00:00:1d.3 cmd <- 01 [DEBUG] PCI: 00:00:1d.7 subsystem <- 8086/27cc [DEBUG] PCI: 00:00:1d.7 cmd <- 102 [DEBUG] PCI: 00:00:1e.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:1e.0 subsystem <- 8086/2448 [DEBUG] PCI: 00:00:1e.0 cmd <- 100 [DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/27bc [DEBUG] PCI: 00:00:1f.0 cmd <- 107 [DEBUG] PCI: 00:00:1f.2 subsystem <- 8086/27c1 [DEBUG] PCI: 00:00:1f.2 cmd <- 03 [DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/27da [DEBUG] PCI: 00:00:1f.3 cmd <- 101 [DEBUG] PCI: 00:01:00.0 subsystem <- 10ec/8168 [DEBUG] PCI: 00:01:00.0 cmd <- 103 [INFO ] done. [DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 0 / 188 ms [INFO ] Timestamp - device initialization: 3793644650 [INFO ] Initializing devices... [DEBUG] CPU_CLUSTER: 0 init [DEBUG] microcode: sig=0x106ca pf=0x8 revision=0x0 [WARN ] CBFS: 'cpu_microcode_blob.bin' not found. [WARN ] microcode: failed because no ucode was found [INFO ] LAPIC 0x0 in XAPIC mode. [DEBUG] MTRR: Physical address space: [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6 [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0 [DEBUG] 0x00000000000c0000 - 0x000000007f5fffff size 0x7f540000 type 6 [DEBUG] 0x000000007f600000 - 0x00000000cfffffff size 0x50a00000 type 0 [DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1 [DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606 [DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits [DEBUG] MTRR: default type WB/UC MTRR counts: 6/4. [DEBUG] MTRR: UC selected as default type. [DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 [DEBUG] MTRR: 1 base 0x000000007f600000 mask 0x0000000fffe00000 type 0 [DEBUG] MTRR: 2 base 0x000000007f800000 mask 0x0000000fff800000 type 0 [DEBUG] MTRR: 3 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 [DEBUG] MTRR check [DEBUG] Fixed MTRRs : Enabled [DEBUG] Variable MTRRs: Enabled [DEBUG] CPU has 4 cores. [DEBUG] Setting up SMI for CPU [INFO ] Will perform SMM setup. [INFO ] CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. [INFO ] LAPIC 0x0 in XAPIC mode. [DEBUG] CPU: APIC: 00 enabled [DEBUG] CPU: APIC: 01 enabled [DEBUG] CPU: APIC: 02 enabled [DEBUG] CPU: APIC: 03 enabled [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 [DEBUG] Processing 16 relocs. Offset value of 0x00030000 [DEBUG] Attempting to start 3 APs [DEBUG] Waiting for 10ms after sending INIT. [DEBUG] Waiting for SIPI to complete... [INFO ] LAPIC 0x1 in XAPIC mode. [DEBUG] done. [INFO ] AP: slot 3 apic_id 1, MCU rev: 0x00000000 [DEBUG] Waiting for SIPI to complete... [DEBUG] done. [INFO ] LAPIC 0x2 in XAPIC mode. [INFO ] LAPIC 0x3 in XAPIC mode. [INFO ] AP: slot 1 apic_id 2, MCU rev: 0x00000000 [INFO ] AP: slot 2 apic_id 3, MCU rev: 0x00000000 [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1d8 memsize: 0x1d8 [DEBUG] Processing 9 relocs. Offset value of 0x00038000 [DEBUG] smm_module_setup_stub: stack_top = 0x7f601000 [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000 [DEBUG] SMM Module: stub loaded at 38000. Will call 0x7f2a84bb [DEBUG] Installing permanent SMM handler to 0x7f600000 [DEBUG] HANDLER [0x7f67e000-0x7f67f18f] [DEBUG] CPU 0 [DEBUG] ss0 [0x7f67dc00-0x7f67dfff] [DEBUG] stub0 [0x7f676000-0x7f6761d7] [DEBUG] CPU 1 [DEBUG] ss1 [0x7f67d800-0x7f67dbff] [DEBUG] stub1 [0x7f675c00-0x7f675dd7] [DEBUG] CPU 2 [DEBUG] ss2 [0x7f67d400-0x7f67d7ff] [DEBUG] stub2 [0x7f675800-0x7f6759d7] [DEBUG] CPU 3 [DEBUG] ss3 [0x7f67d000-0x7f67d3ff] [DEBUG] stub3 [0x7f675400-0x7f6755d7] [DEBUG] stacks [0x7f600000-0x7f600fff] [DEBUG] Loading module at 0x7f67e000 with entry 0x7f67e54b. filesize: 0x1140 memsize: 0x1190 [DEBUG] Processing 49 relocs. Offset value of 0x7f67e000 [DEBUG] Loading module at 0x7f676000 with entry 0x7f676000. filesize: 0x1d8 memsize: 0x1d8 [DEBUG] Processing 9 relocs. Offset value of 0x7f676000 [DEBUG] smm_module_setup_stub: stack_top = 0x7f601000 [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x80000 [DEBUG] SMM Module: placing smm entry code at 7f675c00, cpu # 0x1 [DEBUG] SMM Module: placing smm entry code at 7f675800, cpu # 0x2 [DEBUG] SMM Module: placing smm entry code at 7f675400, cpu # 0x3 [DEBUG] SMM Module: stub loaded at 7f676000. Will call 0x7f67e54b [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f66e000, cpu = 0 [DEBUG] In relocation handler: cpu 0 [DEBUG] New SMBASE=0x7f66e000 [WARN ] SMRR not enabled, skip writing SMRR... [DEBUG] Relocation complete. [DEBUG] CPU doesn't support VMX; exiting [DEBUG] CPU doesn't support VMX; exiting [DEBUG] CPU doesn't support VMX; exiting [DEBUG] CPU doesn't support VMX; exiting [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f66d400, cpu = 3 [DEBUG] In relocation handler: cpu 3 [DEBUG] New SMBASE=0x7f66d400 [DEBUG] Writing SMRR. base = 0x7f600000, mask=0xfff00800 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f66d800, cpu = 2 [DEBUG] In relocation handler: cpu 2 [DEBUG] New SMBASE=0x7f66d800 [DEBUG] Writing SMRR. base = 0x7f600000, mask=0xfff00800 [DEBUG] Relocation complete. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f66dc00, cpu = 1 [DEBUG] In relocation handler: cpu 1 [DEBUG] New SMBASE=0x7f66dc00 [DEBUG] Writing SMRR. base = 0x7f600000, mask=0xfff00800 [DEBUG] Relocation complete. [INFO ] Initializing CPU #0 [DEBUG] CPU: vendor Intel device 106ca [DEBUG] CPU: family 06, model 1c, stepping 0a [INFO ] CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. [INFO ] CPU #0 initialized [INFO ] Initializing CPU #3 [INFO ] Initializing CPU #2 [INFO ] Initializing CPU #1 [DEBUG] CPU: vendor Intel device 106ca [DEBUG] CPU: vendor Intel device 106ca [DEBUG] CPU: family 06, model 1c, stepping 0a [DEBUG] CPU: family 06, model 1c, stepping 0a [INFO ] CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. [INFO ] CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. [INFO ] CPU #2 initialized [INFO ] CPU #1 initialized [DEBUG] CPU: vendor Intel device 106ca [DEBUG] CPU: family 06, model 1c, stepping 0a [INFO ] CPU: Intel(R) Atom(TM) CPU K510 @ 1.66GHz. [INFO ] CPU #3 initialized [DEBUG] CPU 1 going down... [INFO ] bsp_do_flight_plan done after 384 msecs. [DEBUG] CPU 3 going down... [DEBUG] CPU 2 going down... [DEBUG] SMI_STS: [DEBUG] GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO1 GPIO0 [DEBUG] ALT_GP_SMI_STS: GPI15 GPI14 GPI11 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 [DEBUG] TCO_STS: INTRD_DET [DEBUG] Locking SMM. [DEBUG] CPU_CLUSTER: 0 init finished in 692 msecs [DEBUG] DOMAIN: 00000000 init [DEBUG] DOMAIN: 00000000 init finished in 0 msecs [DEBUG] PCI: 00:00:00.0 init [DEBUG] PCI: 00:00:00.0 init finished in 0 msecs [DEBUG] PCI: 00:00:02.0 init [INFO ] CBFS: Found 'vbt.bin' @0x2cd00 size 0x4ab in mcache @0x7f3dd1b4 [INFO ] Timestamp - starting LZMA decompress (ignore for x86): 5046864060 [INFO ] Timestamp - finished LZMA decompress (ignore for x86): 5060057340 [INFO ] Found a VBT of 3730 bytes [INFO ] GMA: Found VBT in CBFS [INFO ] GMA: Found valid VBT in CBFS [DEBUG] gttbase = 7f700000 [INFO ] LAPIC 0x0 in XAPIC mode. [EMERG] CPU Index 0 - APIC 0 Unexpected Exception:2 @ 08:7f2a67d1 - Halting [EMERG] Code: 0 eflags: 00000097 cr2: 00000000 [EMERG] eax: 30213c1c ebx: 00000000 ecx: 0019f0a0 edx: 00000001 [EMERG] edi: 00000001 esi: 302135e6 ebp: 7f2be6e0 esp: 7f2c1010 [EMERG] 0x7f2a6790: 84 b8 ff ff 83 c4 0c 50 [EMERG] 0x7f2a6798: 68 98 5a 2b 7f 6a 03 e8 [EMERG] 0x7f2a67a0: 10 3e 00 00 83 c4 20 83 [EMERG] 0x7f2a67a8: c8 ff 5b 5e 5f c3 e9 74 [EMERG] 0x7f2a67b0: 3a 00 00 57 56 53 0f ae [EMERG] 0x7f2a67b8: f0 0f 31 89 d7 89 c6 e8 [EMERG] 0x7f2a67c0: 63 3a 00 00 f7 64 24 10 [EMERG] 0x7f2a67c8: 89 c1 89 d3 0f ae f0 0f [EMERG] 0x7f2a67d0: 31 29 f0 19 fa 39 c8 89 [EMERG] 0x7f2a67d8: d0 19 d8 73 04 f3 90 eb [EMERG] 0x7f2a67e0: eb 5b 5e 5f c3 55 57 56 [EMERG] 0x7f2a67e8: 53 83 ec 1c 83 3d 40 96 [EMERG] 0x7f2a67f0: 2c 7f 00 75 1f e8 2d 3a [EMERG] 0x7f2a67f8: 00 00 0f ae f0 0f 31 c7 [EMERG] 0x7f2a6800: 05 40 96 2c 7f 01 00 00 [EMERG] 0x7f2a6808: 00 a3 4c 96 2c 7f 89 15 [EMERG] 0x7f2c108c: 0x7f2be6e0 [EMERG] 0x7f2c1088: 0x7f2c10a8 [EMERG] 0x7f2c1084: 0x7f2b3fb7 [EMERG] 0x7f2c1080: 0x00000007 [EMERG] 0x7f2c107c: 0xffa3b996 [EMERG] 0x7f2c1078: 0x1f288f8e [EMERG] 0x7f2c1074: 0x9c000000 [EMERG] 0x7f2c1070: 0x000e0d4f [EMERG] 0x7f2c106c: 0x001fbf81 [EMERG] 0x7f2c1068: 0x5582504f [EMERG] 0x7f2c1064: 0x5f2b3fbf [EMERG] 0x7f2c1060: 0x7f2aa449 [EMERG] 0x7f2c105c: 0x7f2bd360 [EMERG] 0x7f2c1058: 0x7f800000 [EMERG] 0x7f2c1054: 0x0000ef58 [EMERG] 0x7f2c1050: 0x7f2cba5c [EMERG] 0x7f2c104c: 0x000000a3 [EMERG] 0x7f2c1048: 0x000000a3 [EMERG] 0x7f2c1044: 0x00000020 [EMERG] 0x7f2c1040: 0x00000001 [EMERG] 0x7f2c103c: 0x7f297c4f [EMERG] 0x7f2c1038: 0xfe880000 [EMERG] 0x7f2c1034: 0xe0000000 [EMERG] 0x7f2c1030: 0xfe880000 [EMERG] 0x7f2c102c: 0x7f2a67c4 [EMERG] 0x7f2c1028: 0x7f2c1048 [EMERG] 0x7f2c1024: 0x7f2b05cd [EMERG] 0x7f2c1020: 0x000003e8 [EMERG] 0x7f2c101c: 0x7f299150 [EMERG] 0x7f2c1018: 0x000000ff [EMERG] 0x7f2c1014: 0x00000001 [EMERG] 0x7f2c1010: 0x00000001 <-esp FATAL: read zero bytes from port term_exitfunc: reset failed for dev UNKNOWN: Input/output error * Affected hardware: Intel D510mo ---------------------------------------- I wanted to update this little board to coreboot-25.06-9fe1546ffe but it seems it is broken. I cleared cmos, switched RAM just in case. Previous (working) rom was 24.05. I have trouble reflashing with my test clip so I'll desolder later to recover. Please see log attached. (serial) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
