Dear coreboot Community, Please be reminded that we have an upcoming leadership meeting scheduled for Wednesday, February 18, 2026. [1]
Kindly update the agenda with any issues you'd like to discuss during the meeting. [2] Thank you. ## Current Agenda Items ### [Matt] Attendance for review sessions has been pretty low; should we adjust the date/time? ### [Matt] Several areas have no maintainers currently, so patches pushed often have no reviewers automatically assigned. Perhaps we have a default/fallback group of maintainers (~5 ppl?) that are assigned when none exist? ### [Matt] Several mainboards have or are in the process of implementing power sequencing for gen4/5 NVMe drives, as the existing GPIO frameworks are not sufficient to meet the power sequencing timing requirements. * How can we add this at the project level to avoid duplication? * How can we do this pre-device init when device enablement/presence is unknown? ### [Werner] Representatives from Intel responsible for the FSP singing approach (Ravi) will be in this meeting. The community is able to ask remaining questions in the scope of FSP signing. [1](https://coreboot.org/calendar.html). [2](https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkKrgKjeDQ). _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
