# 2026-03-04 - coreboot Leadership Meeting
## Open Action Items
* 2024-11-27
* [Open] Send out poll with regards to LLM usage (requested by SFC)
* 2024-10-30
* [Open] Add clarification to docs: “Do not use gerrit change-id or CB:
format in reference to already-merged patches.”
* 2024-10-16
* [Open] Matt: Set up a meeting to discuss board status alternatives and
send out invites.
* Decouple data collection with uploading
* Require gerrit credentials or other auth to push
* Json format?
* https://github.com/chrultrabook/linux-tools/blob/main/debugging.sh
* 2024-09-18
* [Open] Jon: Schedule a dedicated meeting to discuss the Coverity defects
and action plan.
* Werner: Send out an invite for the meeting.
Sent out a poll to find a time slot:
https://rallly.co/invite/1c8J3azXAcje
* 2024-05-01
* [Open] Nick Van Der Harst volunteered for Dutch. "gogo gogo" would like
to translate to Russian (?).
* 2024-01-10
* Nico: (https://review.coreboot.org/q/topic:enforce_region_api)
* [Open] Daniel: Look at how we want to localize (non-console) strings
for coreboot. Long-term project.
## Announcements & Events
* Next Open System Firmware - OCP Project Meeting
* Date: [March 12, 2026](https://coreboot.org/calendar.html)
## Attendees
Mina Asante, Alicja Michalska, Jay Talbott, Karthik R, Matt DeVillier, Werner
Zeh, Julius Werner, David Hendricks.
## Minutes
### [Matt] several mainboards have or are in the process of implementing power
sequencing for gen4/5 NVMe drives as the existing GPIO frameworks are not
sufficient to meet the power sequencing timing requirements.
* How can we add this at the project level to avoid duplication?
* How can we do this pre-device init when device enablement/presence is
unknown?
* [Matt] Google is currently doing it across stages with GPIOs (e.g.
enabling power in romstage and then de-assert the reset in ramstage
automatically provides the required 100 ms delay without the need to wait in
ramstage for the time to expire, see
(https://review.coreboot.org/c/coreboot/+/91369) and
(https://review.coreboot.org/c/coreboot/+/90973)).
* [Julius] Could write a stage-persistent timeout-keeping framework, but
do we need to? Seems like for now just eyeballing it across stages is good
enough.
* [Matt] I just wanted to hear other people’s opinion
* [Karthik] We have similar approaches via ACPI, but in this case
coreboot defines the ACPI entries and the OS takes care of the required actions
to set and clear GPIOs.
* Keep it as it is for now, and revisit it later if changes are needed.
# Next Leadership Meeting Date
* March 18, 2026.
* [coreboot Calendar](https://coreboot.org/calendar.html).
# Notice
Decisions shown here are not necessarily final and are based
on the current information available. If there are questions or comments
about decisions made, or additional information to present, please put
it on the leadership meeting agenda and show up if possible to discuss
it.
Of course items may also be discussed on the mailing list, but as it's
difficult to interpret tone over email, controversial topics frequently
do not have good progress in those discussions. For particularly
difficult issues, it may be best to try to schedule another meeting.
# coreboot Leadership Meeting Notes
https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkKrgKjeDQ.
_______________________________________________
coreboot mailing list -- [email protected]
To unsubscribe send an email to [email protected]
