Issue #660 has been updated by Walter Sonius.
It works now... for the Acer TravelMate P-633M [CB:91512](https://review.coreboot.org/c/coreboot/+/91512), perhaps need to do a `make distclean` for the Dell Vostro A270 aswell The new EDK2 graphical UI scale setting also gets saved. Will keep this updated for the Dell, if it still fails will try some debug `printk(BIOS_SPEW, "Failed cfr setting at x line?\n")`? ---------------------------------------- Bug #660: CFR options showup, can be adjusted, can be saved but don't have effect? https://ticket.coreboot.org/issues/660#change-2377 * Author: Walter Sonius * Status: New * Priority: Normal * Category: chipset configuration * Target version: none * Start date: 2026-08-04 ---------------------------------------- Have build several times CFR options into multiple snd_ivb/haswell/skylake ports over the past few months and cannot remember one time it worked besides from being that the menu options showup. Its settings can be adjusted and saved and after reboot it shows that they are saved but have no effect. For instance Dell Vostro 270 (Ivy Bridge) [CB:89412](https://review.coreboot.org/c/coreboot/+/89412), using the following additions: Makefile.c ``` ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c ``` cfr.c ``` /* SPDX-License-Identifier: GPL-2.0-only */ #include <boot/coreboot_tables.h> #include <console/cfr.h> #include <drivers/option/cfr_frontend.h> #include <northbridge/intel/sandybridge/cfr.h> #include <southbridge/intel/bd82x6x/cfr.h> // copy pasted ht section in src/northbridge/intel/sandybridge/cfr.h //static const struct sm_object hyper_threading = SM_DECLARE_BOOL({ // .opt_name = "hyper_threading", // .ui_name = "Hyper-Threading", // .ui_helptext = "Enable or disable Hyper-Threading", // .default_value = true, //}); static struct sm_obj_form system = { .ui_name = "System", .obj_list = (const struct sm_object *[]){&debug_level, &gfx_uma_size, &me_state, &me_state_prev, &nmi, &hyper_threading, &sata_mode, NULL}, }; static struct sm_obj_form power = { .ui_name = "Power", .obj_list = (const struct sm_object *[]){&power_on_after_fail, NULL}, }; static struct sm_obj_form *sm_root[] = {&system, &power, NULL}; void mb_cfr_setup_menu(struct lb_cfr *cfr_root) { cfr_write_setup_menu(cfr_root, sm_root); } ``` Kconfig ``` select DRIVERS_OPTION_CFR_ENABLED if PAYLOAD_EDK2 && SMMSTORE ``` If payload is EDK2(MrChromebox2605) on coreboot 26.06-645-gc6c871909a12-dirty and driver `SMMSTORE` is enabled so Secureboot is also included it is possible to enable `DRIVERS_OPTION_CFR ` which auto enables `DRIVERS_EFI_VARIABLE_STORE`. Do you also need to specify "Option backend to use" like CMOS, since after I enabled CFR driver as build option it shows a additional make menu option in this section which I have tried with and without. ``` USE_UEFI_VARIABLE_STORE ( ) Use UEFI variable-store in SPI flash as option backend ``` Have tried adjusting debug_level, hyper_threading, power_on_after_fail and they all remain the same. Any hints, the cmos options do work for this board though? -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
