Dear Kirill,
Sorry to trouble you.
I am trying to make the Crash can parse the kernel with 5-level paging.
I met a problem, seek help.
IMO, all user-sapce tasks must using 5-level paging if the kernel
has been in 5-level paging decided by '__pgtable_l5_enabled=1'. Correct?
And, In the Documentation/x86/x86_64/5level-paging.txt:
...
To mitigate this, we are not going to allocate virtual address space
above 47-bit by default.
But userspace can ask for allocation from full address space by
specifying hint address (with or without MAP_FIXED) above 47-bits.
...
I guess it just means that some user-space tasks can't using the address
above 47-bits, it doesn't mean that the tasks will back to use 4-level
paging if the kernel has been in 5-level paging. Is it right?
Thanks,
dou
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