The gssq instruction is a Loongson extended instruction, so the gssq patch
is applied to gdb.
Signed-off-by: Huacai Chen <chenhua...@loongson.cn>
Signed-off-by: Youling Tang <tangyoul...@loongson.cn>
---
v1 -> v2:
- Move the patch into the gdb-7.6.patch file.
gdb-7.6.patch | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/gdb-7.6.patch b/gdb-7.6.patch
index f64b55f..63c9a14 100644
--- a/gdb-7.6.patch
+++ b/gdb-7.6.patch
@@ -2500,4 +2500,23 @@ diff -up gdb-7.6/opcodes/configure.orig
gdb-7.6/opcodes/configure
+struct target_desc *tdesc_aarch64;
#include "features/aarch64.c"
#include "features/aarch64-without-fpu.c"
-
+
+--- gdb-7.6/gdb/mips-tdep.c.orig
++++ gdb-7.6/gdb/mips-tdep.c
+@@ -3261,6 +3261,16 @@ restart:
+ /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra. */
+ set_reg_offset (gdbarch, this_cache, reg, sp + low_word);
+ }
++ else if (((inst & 0xFFE08020) == 0xeba00020) /* gssq
reg,reg,offset($sp) */
++ && regsize_is_64_bits)
++ {
++ reg = (inst >> 16) & 0x1F;
++ low_word = ((((inst >> 6) & 0x1FF) ^ 0x100) - 0x100) << 4;
++ set_reg_offset (gdbarch, this_cache, reg, sp + low_word);
++ reg = inst & 0x1F;
++ low_word = (((((inst >> 6) & 0x1FF) ^ 0x100) - 0x100) << 4) + 8;
++ set_reg_offset (gdbarch, this_cache, reg, sp + low_word);
++ }
+ else if (high_word == 0x27be) /* addiu $30,$sp,size */
+ {
+ /* Old gcc frame, r30 is virtual frame pointer. */
--
2.1.0
--
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