Hello cross-distro, I thought it a good idea to send an update on gcc support for LSE == Large System Extensions. These are a series of instructions introduced in Armv8.1 that allow one to atomically update values using a single instruction rather than as a sequence of: Load Exclusive + modify + store exclusive. This extension is optional, meaning that not all implementations support it. It has to be selected at runtime. As atomic operations are rather fundamental operations, existing mechanisms (such as ifunc resolvers) are not really suitable for runtime selection. glibc 2.28+ supports HWCAP_ATOMICS for runtime selection meaning .so's can be deployed in an "atomic" folder. The trouble with this approach is that it requires more building and testing work to deploy multiple .so's. Recently, in gcc 10, there is support for "-moutline-atomics". This flag prompts gcc to generate both exclusive monitor and LSE code for atomic operations and the pertinent routine is selected at runtime. The runtime selection process involves a conditional direct branch and has been found to only have a modest overhead. From gcc 10.1 upwards, -moutline-atomics is enabled by default (but can be disabled by -mno-outline-atomics) For those interested in backports of this functionality into older versions of gcc please see: GCC-8 aarch64: Add early clobber for aarch64_store_exclusive https://gcc.gnu.org/git?p=gcc.git;a=commit;h=512b0ffab3bc4f334cbb36c598192c1da2abe330 aarch64: Simplify LSE cas generation https://gcc.gnu.org/git?p=gcc.git;a=commit;h=1bf932b1ab9002089ddd79d64532186d7320d6b5 aarch64: Improve cas generation https://gcc.gnu.org/git?p=gcc.git;a=commit;h=369a4d6dd2df645f1870506d8dd6a5a265955b34 aarch64: Improve swp generation https://gcc.gnu.org/git?p=gcc.git;a=commit;h=5d8ff6f1ff2cef121dc33d954535fc4cf5648cb6 aarch64: Improve atomic-op lse generation https://gcc.gnu.org/git?p=gcc.git;a=commit;h=f557aa1a836377d49fdbd4e7cecb2eede55b1dd2 aarch64: Remove early clobber from ATOMIC_LDOP scratch https://gcc.gnu.org/git?p=gcc.git;a=commit;h=5497bc389dca6a992aaa063df308959f23409c3f aarch64: Extend %R for integer registers https://gcc.gnu.org/git?p=gcc.git;a=commit;h=c7ae64412b6c9c7b966f3c0ab8eaa51c220ea39c aarch64: Implement TImode compare-and-swap https://gcc.gnu.org/git?p=gcc.git;a=commit;h=1101198f3d099af0555d7202a2a00c96d39ee4e2 Aarch64: Fix shrinkwrapping interactions with atomics (PR92692) https://gcc.gnu.org/git?p=gcc.git;a=commit;h=0b65e477890b7fe7f47a3dd85975ab7ee09b0609 aarch64: Tidy aarch64_split_compare_and_swap https://gcc.gnu.org/git?p=gcc.git;a=commit;h=eccc28184d58dc27232d6710dc44eb2c91c01060 aarch64: Add out-of-line functions for LSE atomics https://gcc.gnu.org/git?p=gcc.git;a=commit;h=06f8058a8368f79e2cbf4659db53b941895f271a Add visibility to libfunc constructors https://gcc.gnu.org/git?p=gcc.git;a=commit;h=36579491fa01039694ad12e673ffe523c69dd156 aarch64: Implement -moutline-atomics https://gcc.gnu.org/git?p=gcc.git;a=commit;h=ff54767725cd86e1d937cde50ec499a318b25997 aarch64: Fix store-exclusive in load-operate LSE helpers https://gcc.gnu.org/git?p=gcc.git;a=commit;h=4eaef24ba1f83ccfb54c9e473eb203cce3a9f12f aarch64: Configure for sys/auxv.h in libgcc for lse-init.c https://gcc.gnu.org/git?p=gcc.git;a=commit;h=5d44ad1e0a66651495ed964058cdd6db0d99d876 aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368] https://gcc.gnu.org/git?p=gcc.git;a=commit;h=163e0d03f2cdc80de4968c4be4694cdaeaf47fcd aarch64: Fix bootstrap with old binutils [PR93053] https://gcc.gnu.org/git?p=gcc.git;a=commit;h=a69a60c4969cea06c1d44b5e3e4970595041e510 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] https://gcc.gnu.org/git?p=gcc.git;a=commit;h=1dbd821ee74e6c234e61e25b0801a0b0949bcc67 re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2-a+sve) https://gcc.gnu.org/git?p=gcc.git;a=commit;h=69472d76d2456a447f61bc539bd6fe262c167bcf aarch64: Fix for PR target/94814 Backport of PR target/94518: Fix memmodel index in aarch64_store_exclusive_pair https://gcc.gnu.org/git?p=gcc.git;a=commit;h=034dfe065033a846761b0a5c35fc86023bee1874 aarch64: Force TImode values into even registers https://gcc.gnu.org/git?p=gcc.git;a=commit;h=80c605c875fb394212164908151bf0f8665f0391 [AArch64] Use __getauxval instead of getauxval in LSE detection code in libgcc https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d0d2a937abf6ea0e03bfd7cb56c0f976ba03cbf1 GCC-9 aarch64: Extend %R for integer registers https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=Ea7ffe1da05df28c8dd5c1f5292b31df69f1a9ef aarch64: Implement TImode compare-and-swap https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=53c1356515ac1357c341b594326967ac4677d891 [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=Ea376dd471a3b006bc48945c1d9a29408ab17a04 aarch64: Tidy aarch64_split_compare_and_swap https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=43e46197c10daad6e0aee839c85266c246e78bb2 aarch64: Add out-of-line functions for LSE atomics https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b36f6a808e5ce7484c1039458f2e3137934190b2 aarch64: Implement -moutline-atomics https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=9cf2784a69e126283c33fdbcfbf5713106e87479 aarch64: Fix store-exclusive in load-operate LSE helpers https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=bb9156ede009cfb572ab98c64288de5b21a89c17 aarch64: Configure for sys/auxv.h in libgcc for lse-init.c https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=c15ff4d0803ffd02fdb9147e82e8881f3620e848 aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=13f6d5ac48a7d55b41927849aeebc5832f8c63f0 aarch64: Fix bootstrap with old binutils [PR93053] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=bfe912a35c0c39a623ba6e0066b6010e0ade0f5e aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=be64fc4cab7facee309447302b6ee7616dfe60b4 re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2-a+sve) https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=65709f4b93c74101440ab16bf4bddf6e44672177 [AArch64] PR target/94518: Fix memmodel index in aarch64_store_exclusive_pair https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=470626394ab7779cb663258048da821a502a1e82 [AArch64] Use __getauxval instead of getauxval in LSE detection code in libgcc https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b6dc99434abb6f5fa70ced8790bcae29d4b6a4b1 Cheers, -- Steve Capper IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ cross-distro mailing list cross-distro@lists.linaro.org https://lists.linaro.org/mailman/listinfo/cross-distro
