On 08/28/08 08:51 AM, Ferenc Rakoczi wrote: > The packed integer shift can help a lot, although > I would not believe getting 5x out of just that > can be achieved.
Depends on baseline :-) But seriously, I would agree. For something like AES-CBC its difficult to get 5X over an optimized implementation even using the Intel AES-NI instructions (for ECB, or CTR the gains are likely much bigger). -Lawrence > I don't know if they also > have a 128-bit AND instruction (or a similar packed AND), > but if they do, a combination of that with this new > packed shift would go a long way. > > Ferenc > > On 08/26/08 17:01, Darren J Moffat wrote: > >> An interesting thread to follow on cryptography@ ... >> >> -------- Original Message -------- >> Subject: 5x speedup for AES using SSE5? >> Date: Sat, 23 Aug 2008 14:00:44 +0100 >> From: Paul Crowley <paul at ciphergoth.org> >> To: cryptography at metzdowd.com >> >> http://www.ddj.com/hpc-high-performance-computing/201803067 >> >> In the above Dr Dobb's article from a little over a year ago, AMD Senior >> Fellow Leendert vanDoorn states "the Advanced Encryption Standard (AES) >> algorithm gets a factor of 5 performance improvement by using the new >> SSE5 extension". However, glancing through the SSE5 specification, I >> can't see at all how such a dramatic speedup might be achieved. Does >> anyone know any more, or can anyone see more than I can in the spec? >> >> http://developer.amd.com/cpu/SSE5/Pages/default.aspx >> > _______________________________________________ > crypto-discuss mailing list > crypto-discuss at opensolaris.org > http://mail.opensolaris.org/mailman/listinfo/crypto-discuss > -- Lawrence Spracklen Architecture Technology Group http://blogs.sun.com/sprack -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://mail.opensolaris.org/pipermail/crypto-discuss/attachments/20080828/22ea4c70/attachment.html>
