Cryptography-Digest Digest #543, Volume #10 Wed, 10 Nov 99 23:13:03 EST
Contents:
Re: Data Scrambling references ("Douglas T. Yoest")
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Date: Wed, 10 Nov 1999 21:27:36 -0800
From: "Douglas T. Yoest" <[EMAIL PROTECTED]>
Reply-To: [EMAIL PROTECTED]
Subject: Re: Data Scrambling references
This is a multi-part message in MIME format.
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Hi Larry,
Just been doing that very thing. There are several important questions that
you
have to answer in order to select the best method. From your description you
need
a 'communications' random stream rather than a 'crypographic' random stream.
Undoubtedly, it is there to 1) smooth the spectrum of your data to optimize
power on the communications channel, and 2) to ensure an adequate number of
transitions to
facilitate clock recovery at the receiver. The common technique as John Savard
suggested is to use an LFSR to provide the desired random stream. The question
then
is how do you employ the darn thing. If you xor the output of the LFSR to your
data stream, you will have to give up some bandwidth to allow for synchronizing
the encoder and the decoder. In the presence of communications errors, each
communications error will result in 1 output error (that is no error
extension). But if you lose a bit or gain a bit (caused by differing clock
rates at the transmitter and the receiver (and they are almost always a little
different)) the encoder and decoder will be out of sync. Thus, you have to
provide a sync mechanism.
If you can't tolerate the overhead, an alternative is to use the LFSR as a
feedthrough randomizer. I have attached a drawing of a bit serial feedthrough
randomizer
using a trivial polynomial.As shown in the example, the feedback bit to the
encoder
is the randomized data. At the decoder, the received data is input to the
register.
barring communications error the state of each of the registers is identical,
so the
decoder will strip off the randomizer bit applied at the encoder. If a bit
error occurs, the decoder state will be different from the encoder state, so
the output will contain errors until the incorrect bit dpros out of the decoder
register.(3 bit times in this example). This is called error extension. In a
noisy environment, this is a bad thing. If you have a clean communications
channel you probably won't care.The important thing is that it is
self-synchronizing. After N bits the encoder and the decoder have the same
state, thus no overhead.
So now, we have to address the problem of converting the bit serial randomizer
to a
parallel version. There is math behind this that I used to remember, but don't
now,
so I just slog through one bit at a time. For the example assume the bits to be
sent
are D, C, B, and A (msb to lsb) and that the current state of the LFSR is Z, Y,
and X
in(3 downto 0) = "DCBA",
R(2 downto 0) = "ZYX";
Input Feedback Output
A Z Y X A+X+Y (AXY)
B AXY Z Y B+Y+Z (BYZ)
C BYZ AXY Z C+AXY+Z (ACXYZ)
D ACXYZ BYZ AXY D+BYZ+AXY (ABDXZ)
Thus to parallelize the sinmple example for a 4 bit word width compute
out(0) = A xor X xor Y = in(0) xor R(0) xor R(1);
out(1) = B xor Y xor Z = in(1) xor R(1) xor R(2);
out(2) = A xor C xor X xor Y xor Z = in(0) xor in(2) xor R(0) xor R(1) xor
R(2);
out(3) = A xor B xor D xor X xor Z = in(0) xor in(1) xor in(3) xor R(0) xor
R(2);
and then the feedback register for the next 4 bit word is the last three output
bits
R'(0) = out(1);
R'(1) = out(2);
R'(3) = out(3);
Now remembering that this is for any word time in the process, its easy to see
that
the output bits are a thorough scrambling of the current and previous input
bits.
Basically the design is an LFSR that gets bumped in its state space every time
the
input bit is a one. Note that its possible to get bumped to the all zero state,
and stuck there if the input stream contains long runs of '0's.
So whats left. You need to pick a suitable polynomial for for your LFSR.There
is a web site at http://sue.csc.uvic.ca/~cos/gen/poly.html where you can find
primitive
polynomials up to degree = 31. The choice of length (degree) and the taps you
choose
depend on how much error extension you can tolerate, and how scrambled you like
your eggs (i mean data). I went with a degree 7 polynomial (7,4,0).
You also need to pick a word width. The smaller the word width, the less
complicated the implementation (but the more often you have to do it). 16 bits
was a natural word width for our application. The most significant two bits of
that implementation have 11 terms.
Hope this helps, (and I hope I haven't been insulting anyones intelligence)
Doug
Larry Mackey wrote:
> Hi,
>
> I have a project where we need to scramble (and unscramble) a parallel data
> stream such that when the data stream is serialized, the stream is a fairly
> symetrical set of ones and zeros.
>
> The data does not need to be compressed or encrypted rather we need to
> randomize the data on a bit level.
>
> I am trying to find a scheme that encodes and decodes the data words in as
> uncomplicated manner as possible. This is presently a bi-directional path
> but we would like to be able to do this in a single direction only if
> possible. Since all the data in the stream needs to be randomized, the
> decoding procress information needs to be extracted from the data stream or
> decoding logic.
>
> Does anyone have any suggestions, pointers to references, thoughts or
> ideas??
> We have been doing a number of web searches and have not found any
> references that go into enough detail to understand the process enough to
> replicate it.
>
> It appears that high speed data links 100 Mbit/sec and above use this
> approach but we are unable to find a detailed description anywhere of the
> logic, or process. We don't have the $$ to buy all the various upper level
> reference documents called out to determine if they have the information we
> are looking for.
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
Hi Larry,
<p> Just been doing that very thing. There are several
important questions that you
<br>have to answer in order to select the best method. From your description
you need
<br>a 'communications' random stream rather than a 'crypographic' random
stream.
<br>Undoubtedly, it is there to 1) smooth the spectrum of your data to
optimize power on the communications channel, and 2) to ensure an adequate
number of transitions to
<br>facilitate clock recovery at the receiver. The common technique as
John Savard
<br>suggested is to use an LFSR to provide the desired random stream. The
question then
<br>is how do you employ the darn thing. If you xor the output of the LFSR
to your data stream, you will have to give up some bandwidth to allow for
synchronizing the encoder and the decoder. In the presence of communications
errors, each communications error will result in 1 output error (that is
no error extension). But if you lose a bit or gain a bit (caused by differing
clock rates at the transmitter and the receiver (and they are almost always
a little different)) the encoder and decoder will be out of sync. Thus,
you have to provide a sync mechanism.
<p>If you can't tolerate the overhead, an alternative is to use the LFSR
as a feedthrough randomizer. I have attached a drawing of a bit serial
feedthrough randomizer
<br>using a trivial polynomial.As shown in the example, the feedback bit
to the encoder
<br>is the randomized data. At the decoder, the received data is input
to the register.
<br>barring communications error the state of each of the registers is
identical, so the
<br>decoder will strip off the randomizer bit applied at the encoder. If
a bit error occurs, the decoder state will be different from the encoder
state, so the output will contain errors until the incorrect bit dpros
out of the decoder register.(3 bit times in this example). This is called
error extension. In a noisy environment, this is a bad thing. If you have
a clean communications channel you probably won't care.The important thing
is that it is self-synchronizing. After N bits the encoder and the decoder
have the same state, thus no overhead.
<p>So now, we have to address the problem of converting the bit serial
randomizer to a
<br>parallel version. There is math behind this that I used to remember,
but don't now,
<br>so I just slog through one bit at a time. For the example assume the
bits to be sent
<br>are D, C, B, and A (msb to lsb) and that the current state of the LFSR
is Z, Y, and X
<p>in(3 downto 0) = "DCBA",
<br>R(2 downto 0) = "ZYX";
<p> Input
Feedback
Output
<br>
A
Z
Y
X A+X+Y (AXY)
<br> B
AXY
Z
Y B+Y+Z (BYZ)
<br> C
BYZ AXY
Z C+AXY+Z (ACXYZ)
<br> D
ACXYZ BYZ AXY
D+BYZ+AXY (ABDXZ)
<p>Thus to parallelize the sinmple example for a 4 bit word width compute
<p>out(0) = A xor X xor Y = in(0) xor R(0) xor R(1);
<br>out(1) = B xor Y xor Z = in(1) xor R(1) xor R(2);
<br>out(2) = A xor C xor X xor Y xor Z = in(0) xor in(2) xor R(0) xor R(1)
xor R(2);
<br>out(3) = A xor B xor D xor X xor Z = in(0) xor in(1) xor in(3) xor
R(0) xor R(2);
<p>and then the feedback register for the next 4 bit word is the last three
output bits
<p>R'(0) = out(1);
<br>R'(1) = out(2);
<br>R'(3) = out(3);
<p>Now remembering that this is for any word time in the process, its easy
to see that
<br>the output bits are a thorough scrambling of the current and previous
input bits.
<br>Basically the design is an LFSR that gets bumped in its state space
every time the
<br>input bit is a one. Note that its possible to get bumped to the all
zero state, and stuck there if the input stream contains long runs of '0's.
<p>So whats left. You need to pick a suitable polynomial for for your LFSR.There
is a web site at <A
HREF="http://sue.csc.uvic.ca/~cos/gen/poly.html">http://sue.csc.uvic.ca/~cos/gen/poly.html</A>
where you can
find primitive
<br>polynomials up to degree = 31. The choice of length (degree) and the
taps you choose
<br>depend on how much error extension you can tolerate, and how scrambled
you like your eggs (i mean data). I went with a degree 7 polynomial (7,4,0).
<br>You also need to pick a word width. The smaller the word width, the
less complicated the implementation (but the more often you have to do
it). 16 bits was a natural word width for our application. The most significant
two bits of that implementation have 11 terms.
<p>Hope this helps, (and I hope I haven't been insulting anyones intelligence)
<p>Doug
<br>
<br>
<p><tt> </tt>
<br>Larry Mackey wrote:
<blockquote TYPE=CITE>Hi,
<p>I have a project where we need to scramble (and unscramble) a parallel
data
<br>stream such that when the data stream is serialized, the stream is
a fairly
<br>symetrical set of ones and zeros.
<p>The data does not need to be compressed or encrypted rather we need
to
<br>randomize the data on a bit level.
<p>I am trying to find a scheme that encodes and decodes the data words
in as
<br>uncomplicated manner as possible. This is presently a bi-directional
path
<br>but we would like to be able to do this in a single direction only
if
<br>possible. Since all the data in the stream needs to be randomized,
the
<br>decoding procress information needs to be extracted from the data stream
or
<br>decoding logic.
<p>Does anyone have any suggestions, pointers to references, thoughts or
<br>ideas??
<br>We have been doing a number of web searches and have not found any
<br>references that go into enough detail to understand the process enough
to
<br>replicate it.
<p>It appears that high speed data links 100 Mbit/sec and above use this
<br>approach but we are unable to find a detailed description anywhere
of the
<br>logic, or process. We don't have the $$ to buy all the various
upper level
<br>reference documents called out to determine if they have the information
we
<br>are looking for.</blockquote>
</html>
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==============9EAF9249A295CCD3CE608A22==
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