If I recall correctly, on a Pentium 4, the ADC (add with carry) instruction
is very slow, so I use the 64-bit SSE2 addition instruction to make the
multi-precision addition faster. On a Core 2, ADC is fast, and there is no
advantage to using SSE2.
--------------------------------------------------
From: "Jeffrey Walton" <[email protected]>
Sent: Wednesday, August 18, 2010 2:46 AM
To: "Crypto++ Users" <[email protected]>
Subject: CPU Detection and SSE2_Add/SSE2_Sub
Hi All/Wei,
I'm having a hard time locating how Crypto++ uses the result of IsP4
beyond SSE2. I know source code is self documenting, but I seem to be
drawing a blank :) Searching the group returns 0 hits [1].
The best I can tell, the major difference is in Integer.cpp with the
following (some #define's removed for clarity). I don't believe I have
ever used Panama and Sosemanuk, so I'm not really concerned with
increases in cipher throughput.
s_pAdd = &Baseline_Add;
s_pSub = &Baseline_Sub;
...
if (HasSSE2())
{
if (IsP4())
{
s_pAdd = &SSE2_Add;
s_pSub = &SSE2_Sub;
}
...
}
Why is it that a P4 will benefit from SSE2_Add/SSE2_Sub, but not, for
example, a Core 2 Duo which supports SSE4?
Jeff
[1]
http://groups.google.com/group/cryptopp-users/search?group=cryptopp-users&q=SSE2_Add+IsP4&qt_g=Search+this+group
Testing Settings...
passed: Your machine is little endian.
passed: Your machine allows unaligned data access.
passed: sizeof(byte) == 1
passed: sizeof(word16) == 2
passed: sizeof(word32) == 4
passed: sizeof(word64) == 8
passed: sizeof(word128) == 16
passed: sizeof(hword) == 4, sizeof(word) == 8, sizeof(dword) == 16
passed: hasMMX == 1, hasISSE == 1, hasSSE2 == 1, hasSSSE3 == 1,
hasAESNI == 0, hasCLMUL == 0, isP4 == 0, cacheLineSize == 64,
AESNI_INTRINSICS == 1
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