[email protected] (Robert Elz) writes:

>    Date:        Thu, 4 Aug 2022 12:49:35 -0000 (UTC)
>    From:        [email protected] (Michael van Elst)
>    Message-ID:  <[email protected]>

>  | The measurement runs with enabled interrupts. If you have lots of 
> interrupts
>  | or interrupts that take some time, the measurement is biased.
>  |
>  | Console output can do this.

>That is what I suspected.   A normal boot dmesg on this system is about
>50KB.   With PCI_CONFIG_DUMP it is about 1MB (just a bit over).  That's
>a lot of work for wscons scrolling (via the BIOS the whole time - the
>dump all happens before the console switches to graphics mode) a fairly
>large screen.


Does this help ?

Index: sys/arch/x86/x86/cpu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/x86/x86/cpu.c,v
retrieving revision 1.203
diff -p -u -r1.203 cpu.c
--- sys/arch/x86/x86/cpu.c      1 Apr 2022 19:57:22 -0000       1.203
+++ sys/arch/x86/x86/cpu.c      7 Aug 2022 09:17:12 -0000
@@ -1336,9 +1336,16 @@ cpu_get_tsc_freq(struct cpu_info *ci)
                 */
                if (ci->ci_data.cpu_cc_freq == 0)
                        freq = freq_from_cpuid = cpu_tsc_freq_cpuid(ci);
+               if (freq != 0)
+                       aprint_debug_dev(ci->ci_dev, "TSC freq "
+                           "from CPUID %" PRIu64 " Hz\n", freq);
 #if NHPET > 0
-               if (freq == 0)
+               if (freq == 0) {
                        freq = hpet_tsc_freq();
+                       if (freq != 0)
+                               aprint_debug_dev(ci->ci_dev, "TSC freq "
+                                   "from HPET %" PRIu64 " Hz\n", freq);
+               }
 #endif
                if (freq == 0) {
                        /*
@@ -1348,20 +1355,33 @@ cpu_get_tsc_freq(struct cpu_info *ci)
                         */
                        overhead = 0;
                        for (int i = 0; i <= 8; i++) {
+                               const int s = splhigh();
                                t0 = cpu_counter();
                                delay_func(0);
                                t1 = cpu_counter();
+                               splx(s);
                                if (i > 0) {
                                        overhead += (t1 - t0);
                                }
                        }
                        overhead >>= 3;
 
-                       /* Now do the calibration. */
-                       t0 = cpu_counter();
-                       delay_func(100000);
-                       t1 = cpu_counter();
-                       freq = (t1 - t0 - overhead) * 10;
+                       /*
+                        * Now do the calibration.
+                        */
+                       freq = 0;
+                       for (int i = 0; i < 1000; i++) {
+                               const int s = splhigh();
+                               t0 = cpu_counter();
+                               delay_func(100);
+                               t1 = cpu_counter();
+                               splx(s);
+                               freq += t1 - t0 - overhead;
+                       }
+                       freq = freq * 10;
+
+                       aprint_debug_dev(ci->ci_dev, "TSC freq "
+                           "from delay %" PRIu64 " Hz\n", freq);
                }
                if (ci->ci_data.cpu_cc_freq != 0) {
                        freq_from_cpuid = cpu_tsc_freq_cpuid(ci);


Reply via email to