John Baldwin wrote:
BTW, can you check the following URL, it's the changes intel has made
to ia32 manual after releasing Core Duo. Maybe you can spot something
there. There are some lapic-related changes.
http://download.intel.com/design/Pentium4/specupdt/25204616.pdf
None of the APIC-related changes affect us. We always access APIC
registers using 32-bit loads and stores for example.
I see, do you have any other ideas why it doesn't work on FreeBSD, while
works OOB on Linux 2.6 (reportedly) and definitely on Windows XP SP2?
Anything specific in our way of lapic/SMP handling?
BTW, I have noticed that we don't mark lapic page as noncacheable, which
seemingly required by the spec. I have made small change (3 lines), but
it doesn't help either.
-Maxim
P.S. I will bring the laptop to BSDCan so that I can let you or anybody
else play with it if it helps to fix the problem.
_______________________________________________
[email protected] mailing list
http://lists.freebsd.org/mailman/listinfo/cvs-all
To unsubscribe, send any mail to "[EMAIL PROTECTED]"
