Peter Tanski wrote:
# $(call one_target,target)
define one_target
$(1) :
    @echo "$(1)"
endef

# for $(word n,text), if n > num words, evaluates to empty
# $(call depend_rec,first_target,rest)
define depend_rec

$$(eval $$(if $$(word 2, $(2)),\
      $$(call depend_rec,\
         $$(firstword $(2)),$$(wordlist 2, $$(words $(2)), $(2))),\
         $$(call one_target,$(2))))

$(1) : $(2)
    @echo "$(1)"

endef

$(eval $(call depend_rec,$(firstword $(dirs)),\
  $(wordlist 2,$(words $(dirs)),$(dirs))))

My biggest concern about this is that it is pretty opaque. And it's not just the syntax: I know that to understand it I have to follow through 2 (or more?) levels of expansion.

I'm wary of diving into $(call) and $(eval) territory. Perhaps I shouldn't be; I'm prepared to be convinced, but as it stands I don't understand the above code at all (and I suspect that even if I did understand it, it is still sufficiently complicated that a comment to explain its workings would be much longer than the code itself).

At the end of this Make will have created targets for each of the items in the list in reverse order:

six :
    [commands]

five : six
    [commands]

...

one : two three four five six
    [commands]

Following this, Make would easily be able to handle building in parallel for libraries/Makefile.

Ok, I don't understand how this would allow parallel building. Haven't you just expressed a serial dependency? To allow parallel building you have to tell make about the actual dependencies between libraries (i.e. the build-depends fields from the .cabal file). Even then, the biggest library is still base by far, and that can't be built in parallel with anything else, so the wins are quite small.

Cheers,
        Simon

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