Repository : ssh://darcs.haskell.org//srv/darcs/ghc On branch : master
http://hackage.haskell.org/trac/ghc/changeset/95755da3745c753af2f9db3eeab8bb6eabea0abf >--------------------------------------------------------------- commit 95755da3745c753af2f9db3eeab8bb6eabea0abf Author: Simon Marlow <[email protected]> Date: Tue Aug 9 12:31:03 2011 +0100 Fix an x86 code generation bug (#5393). In fact, there were two bugs in X86.CodeGen.getNonClobberedOperand: two code fragments were the wrong way around, and we were using the wrong size on an instruction (32 bits instead of the word size). This bit of the code generator must have never worked! >--------------------------------------------------------------- compiler/nativeGen/X86/CodeGen.hs | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler/nativeGen/X86/CodeGen.hs b/compiler/nativeGen/X86/CodeGen.hs index 6ab7cff..b47f11f 100644 --- a/compiler/nativeGen/X86/CodeGen.hs +++ b/compiler/nativeGen/X86/CodeGen.hs @@ -1049,10 +1049,10 @@ getNonClobberedOperand (CmmLoad mem pk) = do then do tmp <- getNewRegNat archWordSize return (AddrBaseIndex (EABaseReg tmp) EAIndexNone (ImmInt 0), - unitOL (LEA II32 (OpAddr src) (OpReg tmp))) + unitOL (LEA archWordSize (OpAddr src) (OpReg tmp))) else return (src, nilOL) - return (OpAddr src', save_code `appOL` mem_code) + return (OpAddr src', mem_code `appOL` save_code) else do getNonClobberedOperand_generic (CmmLoad mem pk) _______________________________________________ Cvs-ghc mailing list [email protected] http://www.haskell.org/mailman/listinfo/cvs-ghc
