Repository : ssh://darcs.haskell.org//srv/darcs/ghc On branch : master
http://hackage.haskell.org/trac/ghc/changeset/b5c84a16f4f92a486c63d90d0d00796c884b361c >--------------------------------------------------------------- commit b5c84a16f4f92a486c63d90d0d00796c884b361c Author: Simon Marlow <[email protected]> Date: Fri Jul 6 13:20:44 2012 +0100 bugfix: coalescing moves from RealReg to VirtualReg got broken at some point >--------------------------------------------------------------- compiler/nativeGen/RegAlloc/Linear/Main.hs | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs index 8c38fd1..b2da1f9 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Main.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs @@ -385,7 +385,7 @@ raInsn platform block_live new_instrs id (LiveInstr (Instr instr) (Just live)) Just (src,dst) | src `elementOfUniqSet` (liveDieRead live), isVirtualReg dst, not (dst `elemUFM` assig), - Just (InReg _) <- (lookupUFM assig src) -> do + isRealReg src || isInReg src assig -> do case src of (RegReal rr) -> setAssigR (addToUFM assig dst (InReg rr)) -- if src is a fixed reg, then we just map dest to this @@ -414,6 +414,11 @@ raInsn _ _ _ _ instr = pprPanic "raInsn" (text "no match for:" <> ppr instr) +isInReg :: Reg -> RegMap Loc -> Bool +isInReg src assig | Just (InReg _) <- lookupUFM assig src = True + | otherwise = False + + genRaInsn :: (FR freeRegs, Instruction instr, Outputable instr) => Platform -> BlockMap RegSet _______________________________________________ Cvs-ghc mailing list [email protected] http://www.haskell.org/mailman/listinfo/cvs-ghc
