cvsuser     04/11/06 04:13:49

  Modified:    src      embed.c
               t/op     jit.t
  Log:
  make main pdd03 conform
  * set I3, 1 indicating the argv argument
  * create a return continuation for main
  
  Revision  Changes    Path
  1.120     +7 -1      parrot/src/embed.c
  
  Index: embed.c
  ===================================================================
  RCS file: /cvs/public/parrot/src/embed.c,v
  retrieving revision 1.119
  retrieving revision 1.120
  diff -u -r1.119 -r1.120
  --- embed.c   22 Oct 2004 13:29:36 -0000      1.119
  +++ embed.c   6 Nov 2004 12:13:46 -0000       1.120
  @@ -1,6 +1,6 @@
   /*
   Copyright: 2001-2003 The Perl Foundation.  All Rights Reserved.
  -$Id: embed.c,v 1.119 2004/10/22 13:29:36 leo Exp $
  +$Id: embed.c,v 1.120 2004/11/06 12:13:46 leo Exp $
   
   =head1 NAME
   
  @@ -406,6 +406,12 @@
   
           VTABLE_push_string(interpreter, userargv, arg);
       }
  +    /*
  +     * place empty return continuation, so that invoke P1
  +     * will terminate the main run loop
  +     */
  +    REG_PMC(1) = new_ret_continuation_pmc(interpreter, NULL);
  +    REG_INT(3) = 1; /* pdd03 - one PMC arg, if code really inspects that */
   }
   
   /*
  
  
  
  1.12      +3 -2      parrot/t/op/jit.t
  
  Index: jit.t
  ===================================================================
  RCS file: /cvs/public/parrot/t/op/jit.t,v
  retrieving revision 1.11
  retrieving revision 1.12
  diff -u -r1.11 -r1.12
  --- jit.t     25 Oct 2004 10:24:17 -0000      1.11
  +++ jit.t     6 Nov 2004 12:13:49 -0000       1.12
  @@ -1,6 +1,6 @@
   #! perl -w
   # Copyright: 2001-2003 The Perl Foundation.  All Rights Reserved.
  -# $Id: jit.t,v 1.11 2004/10/25 10:24:17 leo Exp $
  +# $Id: jit.t,v 1.12 2004/11/06 12:13:49 leo Exp $
   
   =head1 NAME
   
  @@ -13,7 +13,7 @@
   =head1 DESCRIPTION
   
   Tests JIT register allocation. The tests are written for 4 mapped
  -registers per kind, i.e. the crippled x86 architecture. If you are 
  +registers per kind, i.e. the crippled x86 architecture. If you are
   experimenting with register allocation please just use settings like
   in jit/i386/jit_emit, i.e. 4 mapped regs, 2 volatile ints ...
   
  @@ -1160,6 +1160,7 @@
   OUTPUT
   
   output_is(<<'CODE', <<'OUTPUT', "volatile clobbered by function call");
  +  null I3
     add I4, I5, I6
     add I4, I5, I6
     add I4, I5, I6
  
  
  

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