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Date: Tue, 18 Jul 2000 07:30:49 -0400 (EDT)
From: Christof Paar <[EMAIL PROTECTED]>
To: DCSB <[EMAIL PROTECTED]>
Subject: CHES 2000 Program
Sender: [EMAIL PROTECTED]
Reply-To: Christof Paar <[EMAIL PROTECTED]>
PRELIMINARY SCHEDULE
CHES 2000
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Workshop on Cryptographic Hardware and Embedded Systems
Worcester Polytechnic Institute
Worcester, Massachusetts, August 17-18, 2000
http://ece.wpi.edu/Research/crypt/ches
for registration information, check CHES web site above
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=============== WEDNESDAY, AUGUST 16th ==============
5:00 - 10:00 pm REGISTRATION AND RECEPTION
Atwater Kent Building, WPI
(Shuttle Service will be provided between WPI and the Crowne Plaza Hotel)
=============== THURSDAY, AUGUST 17th ===============
7:00 - 8:45 am REGISTRATION AND CONTINENTAL BREAKFAST
Atwater Kent Building, WPI
(Shuttle Service will be provided between WPI and the Crowne Plaza Hotel)
8:45 - 9:15 am WELCOME
Welcome by Jack Carney (Provost, WPI)
Introductory remarks by Cetin Koc and Christof Paar
9:15 - 9:55 am INVITED TALK
Alfred Menezes, University of Waterloo, Canada
Elliptic curve cryptography in constrained environments.
9:55 - 10:55 am IMPLEMENTATION OF ELLIPTIC CURVE CRYPTOSYSTEMS
S. Okada, N. Torii, K. Ito, and M. Takenaka.
Implementation of elliptic curve cryptographic coprocessor over GF(2^m) on
FPGA.
G. Orlando and C. Paar.
A high-performance reconfigurable elliptic curve processor for GF(2^m).
J. W. Chung, S. S. Gyoo, and L. P. Joong.
Fast implementation of elliptic curve defined over GF(p^m) on CalmRISC with
MAC2424 coprocessor.
10:55 - 11:15 am BREAK
11:15 - 12:35 pm POWER AND TIMING ANALYSIS ATTACKS
A. Shamir.
Protecting smart cards from passive power analysis with detached power
supplies.
R. Mayer-Sommer.
Smartly analyzing the simplicity and the power of simple power analysis on
Smartcards.
M. A. Hasan.
Power analysis attacks and algorithmic approaches to their countermeasures for
Koblitz curve cryptosystems.
W. Schindler.
A timing attack against RSA with the Chinese Remainder Theorem.
12:35 - 2:00 pm LUNCH
2:00 - 3:20 pm HARDWARE IMPLEMENTATION OF BLOCK CIPHERS
A. Dandalis, V. K. Prasanna, and J. D. P. Rolim.
A comparative study of performance of AES final candidates using FPGAs.
C. Patterson.
A dynamic FPGA implementation of the Serpent Block Cipher.
S. Trimberger, R. Pang, and A. Singh.
A 12 Gbps DES Encryptor/Decryptor core in an FPGA.
H. Leitold, W. Mayerwieser, U. Payer, K. C. Posch, R. Posch, and J.
Wolkerstorfer.
A 155 Mbps triple-DES network encryptor.
3:20 - 3:40 pm BREAK
3:40 - 5:00 pm HARDWARE ARCHITECTURES
J. Goodman and A. Chandrakasan.
An energy efficient reconfigurable public-key cryptography processor
architecture.
J. Groszschaedl.
High speed RSA hardware based on dynamic true single phase clocked logic.
C. Walter.
Data integrity in hardware for modular arithmetic.
T. Kato, S. Ito, J. Anzai, and N. Matsuzaki.
A design for modular exponentiation coprocessor in mobile telecommunication
terminals.
6:00 - 9:00 pm BANQUET
=============== FRIDAY, AUGUST 18TH ==============
8:00 - 9:00 am REGISTRATION AND CONTINENTAL BREAKFAST
Atwater Kent Building, WPI
(Shuttle Service will be provided between WPI and the Crowne Plaza Hotel)
9:00 - 9:40 am INVITED TALK
David Naccache, Gemplus, France.
How to explain side channel leakage to your kids.
9:40 - 10:40 am POWER ANALYSIS ATTACKS
J.-S. Coron and L. Goubin.
On Boolean and arithmetic masking against differential power analysis.
T. S. Messerges.
Using second-order power analysis to attack DPA resistant software.
C. Clavier, J.-S. Coron, and N. Dabbous.
Differential power analysis in the presence of hardware countermeasures.
10:40 - 11:00 am BREAK
11:00 - 12:00 pm ARITHMETIC ARCHITECTURES
H. Wu.
Montgomery multiplier and squarer in GF(2^m).
E. Savas, A. F. Tenca, and C. K. Koc.
A scalable and unified multiplier architecture for finite fields GF(p) and
GF(2^m).
G. Hachez and J.-J. Quisquater.
Montgomery exponentiation with no final subtraction: Improved results.
12:00 - 1:30 pm LUNCH
1:30 - 2:10 pm PHYSICAL SECURITY AND CRYPTANLYSIS
S. H. Weingart.
Physical security devices for computer subsystems: A survey of attacks and
defenses.
T. Pornin and J. Stern.
Software-Hardware Trade-offs: application to A5/1 Cryptanalysis.
2:10 - 2:50 pm NEW SCHEMES AND ALGORITHMS
J. Hoffstein and J. Silverman.
MiniPASS: Authentication and digital signatures in a constrained environment.
M. Joye, P. Paillier, and S. Vaudenay.
Efficient generation of prime numbers.
For help on using this list (especially unsubscribing), send a message to
"[EMAIL PROTECTED]" with one line of text: "help".
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