Our lcd is 320x240 with RGB mode, we divide the vclk which is 27 Mhz to be
6.75Mhz using the pattern registers.
From: Brettschneider Falk <[EMAIL PROTECTED]>
To: [email protected]
Subject: RE: Connecting an LCD Display to Davinci
Date: Thu, 28 Sep 2006 09:30:45 +0200
Hi,
which resolution do you use?
CU, [EMAIL PROTECTED]
taruna54 taruna54 wrote:
> CLK enable is controlled by VENC_VIOCTL register.. and don't
> forget the
> LCDOUT register.. I put the value 0x2000 for VENC_VIOCTL.. Yupe,
> VENC_DCLKCTL (DCLK control register) and VENC_DCLKPTN0 are
> very important
> for LCD..
> I'd experiment with the pattern, and adjust the clock
> phase/delay to have
> the best picture.
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