Accorging to DDR2 Memory Controller User's Guide (SPRUE22B), the peripheral bus burst priority register (PBBPR) helps prevent command starvation within the DDR2 memory controller. To avoid command starvation, the DDR2 memory controller momentarily raises the priority of the oldest command in the command FIFO after a set number of transfers have been made.
The PR_OLD_COUNT bit sets the number of transfers that must be made before the DDR2 memory controller raises the priority of the oldest command. Changing PR_OLD_COUNT value from 0x20 to 0x10 solved the problem !!! Thanks and regards, Carlos _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
