I had a similiar problem when I first used the windows CCS environment to
play around with the DaVinci; I ran into problems when the examples
require more memory resources and started using DDR. It seems like
the memory map for the DDR
DDR2 : origin = 0x80000000, len = 0x10000000
is set up correctly but the memory controller hasn't initialized it (refresh
rate, etc) when running with the emulator under CCS resulting in access
issues; is that correct?
I'm guessing it works under Linux (non-emulator non-CCS mode) because
the ARM memory controller has initialized the DDR region for use and
hence the DSP could use it. Any way to fix this?
----- Original Message ----
From: DAN <[EMAIL PROTECTED]>
To: ti davinci <[email protected]>
Sent: Thursday, January 11, 2007 4:32:58 AM
Subject: CCS ERROR
hi all
I used the CCS3.2 to run a demo project corr_dma.pjt on DAVINCI.
There was no error in compiler
but the loading program will get following error messages
as loading sections .cinit 32752 of 66596 at 0x8005000
Data verification failed at address 0x80057FF0
Please verify target memory and memory map
and next
as loading sections .cinit 65504 of 66596 at 0x8005000
Data verification failed at address 0x8005FFE0
Please verify target memory and memory map
This is my .cmd file
/* MODULE MEM */
-stack 0x400
MEMORY
{
CACHE_L1P : origin = 0x11e08000, len = 0x8000
CACHE_L1D : origin = 0x11f10000, len = 0x8000
DDR2 : origin = 0x80000000, len = 0x10000000
L1DSRAM : origin = 0x11f04000, len = 0xc000
IRAM : origin = 0x11800000, len = 0x10000
ARM_RAM : origin = 0x10008000, len = 0x4000
VICP : origin = 0x11100000, len = 0x1f400
}
SECTIONS
{
.cinit > DDR2
.text > IRAM
.stack > DDR2
.bss > DDR2
.const > DDR2
.data > DDR2
.far > DDR2
.switch > IRAM
.sysmem > DDR2
.tables > DDR2
.cio > DDR2
.imgbuf > DDR2
}
what's the problem?
Thanks,
Dan.
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