Hi: I haven't dig into the frame buffer device so far. I am treating it as a black box most of the time. According to my rough understanding, the reason why there are two ways of setting is because VSYNC comes at every field, but you only set your frame buffer address every frame. According to SPRUE37, the encoder register are shadowed, and will only be latched during a VSYNC (and that is when the address will be effective, as answer to your second question). So, the driver must make sure that you only change the address at the VSYNC for even field (the first field), not the odd one. The driver use VENC_VSTAT & 0x10 to test for the field id. The video encoder may need to adjust the buffer address when switching from even field to odd field (My guess is that this adjusting is done by the encoder hardware). So, as you can see, if the driver doesn't have any protection, the field order may be messed up when you change the buffer address just before a VSYNC for odd field.
Regards Zheng Lei -----Original Message----- From: ram a [mailto:[EMAIL PROTECTED] Sent: Saturday, February 03, 2007 7:38 PM To: [email protected] Cc: #ZHENG LEI# Subject: Re: avsync query Hi, I have some doubts in the display driver a. In the "davincifb_pan_display" function why the sdram params are directly set in one case and the sdram address is intialized in the other case? if ((dispc_reg_in(VENC_VSTAT) & 0x00000010)==0x10) set_sdram_params(info->fix.id, start, info->fix.line_length); else w->sdram_address = start; similarly in the " davincifb_isr" function, what is the significance of "set_sdram_params" only in one case as shown below? if ((dispc_reg_in(VENC_VSTAT) & 0x00000010) == 0x10) { xchg(&addr, dm->vid1->sdram_address); if (addr) { set_sdram_params(dm->vid1->info.fix.id, dm->vid1->sdram_address, dm->vid1->info.fix.line_length); dm->vid1->sdram_address = 0; } return IRQ_HANDLED; } else { ++dm->vsync_cnt; wake_up_interruptible(&dm->vsync_wait); return IRQ_HANDLED; } alternatively can we have the above functions modified as below? //modified "davincifb_pan_display" function. if ((dispc_reg_in(VENC_VSTAT) & 0x00000010)==0x10) w->sdram_address = start; else w->sdram_address = start; //modified "davincifb_isr" function. if ((dispc_reg_in(VENC_VSTAT) & 0x00000010) == 0x10) { xchg(&addr, dm->vid1->sdram_address); if (addr) { set_sdram_params(dm->vid1->info.fix.id, dm->vid1->sdram_address, dm->vid1->info.fix.line_length); dm->vid1->sdram_address = 0; } return IRQ_HANDLED; } else { if (addr) { set_sdram_params(dm->vid1->info.fix.id, dm->vid1->sdram_address, dm->vid1->info.fix.line_length); dm->vid1->sdram_address = 0; } ++dm->vsync_cnt; wake_up_interruptible(&dm->vsync_wait); return IRQ_HANDLED; } b. If sdram address is set through the function "set_sdram_params" when exactly will this address be effective (ie. when does the disply corresponding to this address begin?) Is it immediately after this function call or at the next field boundary. thanks, ram On 2/1/07, #ZHENG LEI# <[EMAIL PROTECTED]> wrote: I don't think you need to concern about the kernel or user space issue here. It works pretty well in user space according to my test. If you are using analog output, i.e. NTSC or PAL, then you can rely on VSYNC to get the correct frame rate. If fact, if you are playback from disk file, you just need one inital wait to align the audio and video, and then let them run freely. As long as your audio clock is set right, your AV will remain sync. Check montavista audio patch 1014. ________________________________ From: ram a [mailto:[EMAIL PROTECTED] Sent: Thu 2/1/2007 11:17 PM To: #ZHENG LEI# Subject: avsync query hi, I am facing some issues in avsync. I have put the avsync code in userspace. The display is very jerky in scenes that have panning. Have u put the avsync logic in the kernel space or userspace? I think that in the kernel space the ISR can be used to shedule each display frame. Can this ISR be accessed in the userspace? Are there any advantages of putting avsync code in kernel space? regards, ram
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