Hello Everybody, I am slightly a newbie, trying to implement/enhance DaVinci SPI over EDMA. According to the DaVinci Technical Reference Manual, if I intended to use EDMA in the ASYNC mode then there are no source and destination address alignment restrictions. I have implemented it this way. And it works very well with small buffers (<4KB). There is absolutely no problem with the address alignment. But when I cross the buffer size of 4KB, the EDMA transfer hangs the system. Sometimes I get "page faults" and kernel panic and sync issues.
This problem did get resolved by making use of the GFP_DMA flag in kmalloc. The memory blocks that are returned are all aligned at 8KBs.TherebyI am able to use buffer sizes of 4KB and more with no issues. But this is not what I actually require. Since I cannot gaurantee that the memory buffers I recieve from the upper layer are always going to be alignment safe. I do not want to waste CPU cycles and resources by maintaining another aligned internal buffer within the SPI driver. I intend to create an SPI driver that can work on buffers with absolutely no memory buffer alignment restrictions. I was hoping will be possible as per what the DaVinci EDMA reference manual specifies. Apparently this is not so. Is there a way to achieve what I am looking for here? Being a newcomer to linux device driver programming I am not so good at kernel hacking. I would really appreciate your help with this issue. BTW: I am using the Davinci DM6446 processor (DaVinci Evaluation Module from Spectrum Digital) and the kernel is Linux-2.6.10_mvl401-davinci_evm(montavista) which came along with the EVM. Thanks and regards, Uthappa
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