You didn't miss anything. The power sequencing is not according to spec on the EVM and TI is aware of it. We implemented the sequencing according to the datasheet on our board though; core first, then IO.
Thomas -----Original Message----- From: [EMAIL PROTECTED] dsp.com [mailto:[EMAIL PROTECTED] .davincidsp.com] On Behalf Of jed smith Sent: 15. mai 2007 18:38 To: [email protected] Subject: power up sequence Hi All, The power up sequence of the EVM seems to conflict with the data sheet ... Im seeing that 3V3 powers up first 2ms later the 1V2 then about 5ms later 1V8, and 20ms laterr reset is released can somone advise, am i missing something ? Jed ____________________________________________________________ PREVENT ACCESSING DANGEROUS WEBSITES - Protect your computer with Free Web Security Guard! More information at http://www.inbox.com/wsg _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
