Hi Dirk, Thanks a lot for your effort. NAND driver was a long due item.
Does the patch apply cleanly to the git kernel. I just downloaded the git kernel and it gave below errors patch -p1 < ../nand-driver-v4.html patching file drivers/mtd/nand/davinci_nand.c patching file drivers/mtd/nand/Makefile patching file drivers/mtd/nand/Kconfig patching file include/asm-arm/arch-davinci/nand.h patching file arch/arm/mach-davinci/mux.c Hunk #1 succeeded at 15 with fuzz 2. patching file include/asm-arm/arch-davinci/mux.h patching file include/linux/mtd/nand.h patching file drivers/mtd/nand/nand_base.c Hunk #1 FAILED at 2456. 1 out of 1 hunk FAILED -- saving rejects to file drivers/mtd/nand/nand_base.c.rej patching file arch/arm/mach-davinci/board-evm.c Hunk #1 FAILED at 14. Hunk #2 FAILED at 28. Hunk #4 FAILED at 71. Hunk #5 FAILED at 203. 4 out of 5 hunks FAILED -- saving rejects to file arch/arm/mach-davinci/board-evm.c.rej patch unexpectedly ends in middle of line THanks --- Dirk Behme <[EMAIL PROTECTED]> wrote: > > This patch adds NAND driver to recent git. Tested on > DM6446 DVEVM. > > It is mainly based on Sander Huijsen > <[EMAIL PROTECTED]> work > > http://linux.omap.com/pipermail/davinci-linux-open-source/2007-December/004788.html > > and HW ECC changes from Troy Kisky > <[EMAIL PROTECTED]> > > http://linux.omap.com/pipermail/davinci-linux-open-source/2008-January/004910.html > > Signed-off-by: Dirk Behme <[EMAIL PROTECTED]> > > > Index: linux-davinci/drivers/mtd/nand/davinci_nand.c > =================================================================== > --- /dev/null > +++ linux-davinci/drivers/mtd/nand/davinci_nand.c > @@ -0,0 +1,638 @@ > +/* > + * linux/drivers/mtd/nand/davinci_nand.c > + * > + * NAND Flash Driver > + * > + * Copyright (C) 2006 Texas Instruments. > + * > + * ported to 2.6.23 (C) 2008 by > + * Sander Huijsen <[EMAIL PROTECTED]> > + * Troy Kisky <[EMAIL PROTECTED]> > + * Dirk Behme <[EMAIL PROTECTED]> > + * > + * > -------------------------------------------------------------------------- > + * > + * This program is free software; you can > redistribute it and/or modify > + * it under the terms of the GNU General Public > License as published by > + * the Free Software Foundation; either version 2 > of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it > will be useful, > + * but WITHOUT ANY WARRANTY; without even the > implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR > PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU > General Public License > + * along with this program; if not, write to the > Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA > 02139, USA. > + * > -------------------------------------------------------------------------- > + * > + * Overview: > + * This is a device driver for the NAND flash > device found on the > + * DaVinci board which utilizes the Samsung > k9k2g08 part. > + * > + * Modifications: > + * ver. 1.0: Feb 2005, Vinod/Sudhakar > + */ > + > +#include <linux/kernel.h> > +#include <linux/init.h> > +#include <linux/module.h> > +#include <linux/platform_device.h> > +#include <linux/err.h> > +#include <linux/clk.h> > +#include <linux/io.h> > +#include <linux/mtd/mtd.h> > +#include <linux/mtd/nand.h> > +#include <linux/mtd/partitions.h> > + > +#include <asm/arch/hardware.h> > +#include <asm/arch/nand.h> > +#include <asm/arch/mux.h> > + > +#include <asm/mach/flash.h> > + > +#ifdef CONFIG_NAND_FLASH_HW_ECC > +#define DAVINCI_NAND_ECC_MODE NAND_ECC_HW3_512 > +#else > +#define DAVINCI_NAND_ECC_MODE NAND_ECC_SOFT > +#endif > + > +#define DRIVER_NAME "davinci_nand" > + > +static struct clk *nand_clock; > +static void __iomem *nand_vaddr; > + > +/* > + * MTD structure for DaVinici board > + */ > +static struct mtd_info *nand_davinci_mtd; > + > +#ifdef CONFIG_MTD_PARTITIONS > +const char *part_probes[] = { "cmdlinepart", NULL > }; > +#endif > + > +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; > + > +/* BB marker is byte 5 in OOB of page 0 */ > +static struct nand_bbt_descr > davinci_memorybased_small = { > + .options = NAND_BBT_SCAN2NDPAGE, > + .offs = 5, > + .len = 1, > + .pattern = scan_ff_pattern > +}; > + > +/* BB marker is bytes 0-1 in OOB of page 0 */ > +static struct nand_bbt_descr > davinci_memorybased_large = { > + .options = 0, > + .offs = 0, > + .len = 2, > + .pattern = scan_ff_pattern > +}; > + > +inline unsigned int davinci_nand_readl(int offset) > +{ > + return davinci_readl(DAVINCI_ASYNC_EMIF_CNTRL_BASE > + offset); > +} > + > +inline void davinci_nand_writel(unsigned long > value, int offset) > +{ > + davinci_writel(value, > DAVINCI_ASYNC_EMIF_CNTRL_BASE + offset); > +} > + > +/* > + * Hardware specific access to control-lines > + */ > +static void nand_davinci_hwcontrol(struct mtd_info > *mtd, int cmd, > + unsigned int ctrl) > +{ > + struct nand_chip *chip = mtd->priv; > + u32 IO_ADDR_W = (u32)chip->IO_ADDR_W; > + > + /* Did the control lines change? */ > + if (ctrl & NAND_CTRL_CHANGE) { > + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); > + > + if ((ctrl & NAND_CTRL_CLE) == NAND_CTRL_CLE) > + IO_ADDR_W |= MASK_CLE; > + else if ((ctrl & NAND_CTRL_ALE) == NAND_CTRL_ALE) > + IO_ADDR_W |= MASK_ALE; > + > + chip->IO_ADDR_W = (void __iomem *)IO_ADDR_W; > + } > + > + if (cmd != NAND_CMD_NONE) > + writeb(cmd, chip->IO_ADDR_W); > +} > + > +static void nand_davinci_select_chip(struct > mtd_info *mtd, int chip) > +{ > + /* do nothing */ > +} > + > +#ifdef CONFIG_NAND_FLASH_HW_ECC > +static void nand_davinci_enable_hwecc(struct > mtd_info *mtd, int mode) > +{ > + u32 retval; > + > + /* Reset ECC hardware */ > + retval = davinci_nand_readl(NANDF1ECC_OFFSET); > + > + /* Restart ECC hardware */ > + retval = davinci_nand_readl(NANDFCR_OFFSET); > + retval |= (1 << 8); > + davinci_nand_writel(retval, NANDFCR_OFFSET); > +} > + > +/* > + * Read DaVinci ECC register > + */ > +static u32 nand_davinci_readecc(struct mtd_info > *mtd) > +{ > + /* Read register ECC and clear it */ > + return davinci_nand_readl(NANDF1ECC_OFFSET); > +} > + > +/* > + * Read DaVinci ECC registers and rework into MTD > format > + */ > +static int nand_davinci_calculate_ecc(struct > mtd_info *mtd, > + const u_char *dat, u_char *ecc_code) > +{ > + unsigned int ecc_val = nand_davinci_readecc(mtd); > + /* squeeze 0 middle bits out so that it fits in 3 > bytes */ > + unsigned int tmp = > (ecc_val&0x0fff)|((ecc_val&0x0fff0000)>>4); > + /* invert so that erased block ecc is correct */ > + tmp = ~tmp; > + ecc_code[0] = (u_char)(tmp); > + ecc_code[1] = (u_char)(tmp >> 8); > + ecc_code[2] = (u_char)(tmp >> 16); > === message truncated ===> _______________________________________________ > Davinci-linux-open-source mailing list > [email protected] > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source > ____________________________________________________________________________________ Never miss a thing. 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