Hello Tom, Thanks for the reply. I think there is convincing evidence in your system that the UART2 and the Video will run to-gether. Regarding the flow control for the UART2 here is the link I was talking about http://www.mail-archive.com/[email protected]/msg03767.html
Also now I'm facing a new problem: I've made the changes as recommended by the mailing list in board-evm.c serial.c and clock.c as shown by this link: http://www.mail-archive.com/[email protected]/msg02308.html But i'm still not able to enable UART2. Is there anything extra that must be done. I've replaced UART1 parameters with that of UART2. as an FYI. the contents of /dev/tts folder contain two devices 0 and 1. This I find very strange as I've not enabled UART1. But upon checking contents of /proc/tty/driver/serial things were clearer. UART1 is infact not enabled... Below are the contents: serinfo:1.0 driver revision: 0: uart:16550A mmio:0x01C20000 irq:40 tx:18696 rx:7118 RTS|CTS|DTR|DSR 1: uart:unknown port:00000000 irq:0 Also the contents of /proc/interrupts are: CPU0 0: 0 dm644xv4l2 6: 0 dm644xresizer 8: 188133 davincifb 12: 1 musb_hdrc 13: 10216 EMAC 22: 671 ide0 32: 19 free-run counter 33: 0 high-res timer 35: 313916 system tick 39: 70774 i2c 40: 25439 serial Err: 0 As you can see only UART0 interrupt is enabled and in drivers too only UART0 is present. Can you figure out where I've gone wrong. Thanks, Preetham T Ziomek <[EMAIL PROTECTED]> wrote: On Wed, Mar 26, 2008 at 05:39:32AM +0000, Preetham Soundararajan wrote: > Hello Tom, > Thanks for the reply. I forgot to mention that we are also using the TI/MV > kernel version 2.6.10. Is it the same that you are using??? Yes. > I did check the Datasheets of the processor. It does say that UART2 is > multiplexed with CI and CCD ports. These ports are however used for > interfacing a CMOS or CCD Image sensor (which we are not using anyways). The > CCTV camera is on the YI port which is not multiplexed with anything. Are you > too using the CCTV camera in your system in addition to UART2??? No, our video input comes from an FPGA... >If yes then I think there should not be any problem. ...and as our video data is 8 bits wide, we use only CCD0-CCD7 and hence we have no pin muxing conflicts with UART2. > Also are you using the UART with flow control??? Yes and no. We have hardware flow control enabled, and have not had any problems with losing bytes, but we have not actually confirmed that the HW flow control is functional. The amount of serial data we pass is low enough relative to our baud rate that it's very unlikely a re- ceive buffer would ever fill up. >Because in some of the previous posts people had faced problems with flow >control. Really...I missed that but would like to know more. But a Google search for site:linux.omap.com "flow control" uart davinci returns only 2 hits, neither of which indicates a problem with flow con- trol. Would you be able to send me a pointer / reference to these previ- ously mentioned issues? Thanks, Tom P.S. It would be nice if you could limit your lines to <80 chars, either manually or by appropriately configuring your MUA. This link illustrates why: Plus, line lengths of ~72-75 chars are standard practice on most mail- lists. Thanks. -- /"\ ASCII Ribbon Campaign | \ / | Email to user 'CTZ001' X Against HTML | at 'email.mot.com' / \ in e-mail & news | Send instant messages to your online friends http://uk.messenger.yahoo.com
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