Hi, It looks like you may not have created TCF configuration file for your program. You can refer to any DSP/BIOS example application for this (available within CCS). If you don't have TCF file, then you will not get any linker command file, which would otherwise have been generated by the TCONF utility that runs when you build the project. If you don't have this, you will get the "entry point symbol undefined error".
The TCF file will have memory map, device information etc. for your device & application. Regards, Mughda -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of cs Sent: Tuesday, May 13, 2008 1:08 PM To: davinci-linux-open-source Subject: How to debug dsp side program using CCS Hi all, For those dual core cpu such as Dm6446 , If I want to develop DSP side program , how to debug the program when using CCS. My board is connected by XDS560 . In parallel debug manager windows , click C6400PLUS_0 enter CCS. Then I load a gel file and create a new simple TMS320C64XX project. the code is as followed int main() { int a,b,c; a = 8788; b = 77564; c = a*b; return c; } when I compile my code, the warning information is shown //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ------------------------------- 2.pjt - Debug ------------------------------- [1.c] "D:\CCStudio_v3.3\C6000\cgtools\bin\cl6x" -g -fr"D:/try/dsp/2/Debug" -d"_DEBUG" -mv6400 -@"../2/Debug.lkf" "1.c" "1.c", line 12: warning: last line of file ends without a newline Warning: The project has no cmd file while the Text Linker is selected [Linking...] "D:\CCStudio_v3.3\C6000\cgtools\bin\cl6x" -@"Debug.lkf" <Linking> warning: entry point symbol _c_int00 undefined Build Complete, 0 Errors, 3 Warnings, 0 Remarks. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// when I load .out file , the following information happen. Do I forget some steps? ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map. Trouble Writing Register: Error 0x00000006/-1176 Error during: Memory, Register, The IM memory request is not serviced by the HW memory system. This could be caused by the memory address specified does not exist in the specified memory/cache level. Sequence ID: 6 Error Code: -1176 Error Class: 0x00000006 ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// the gel file is as followed /* ------------------------------------------------------------------------ * * * * DaVinciEVM_dsp.gel * * Version 3.00 * * * * This GEL file is designed to be used in conjunction with * * CCS 3.2X and the Davinci based EVM. * * * * ------------------------------------------------------------------------ */ /* ------------------------------------------------------------------------ * * * * StartUp( ) * * * * Setup Memory Map * * * * ------------------------------------------------------------------------ */ StartUp( ) { setup_memory_map_dsp( ); } /* ------------------------------------------------------------------------ * * * * OnTargetConnect( ) * * * * ------------------------------------------------------------------------ */ OnTargetConnect( ) { } /* ------------------------------------------------------------------------ * * * * setup_memory_map_dsp( ) * * * * Setup the Memory Map for DSP side only. * * * * ------------------------------------------------------------------------ */ setup_memory_map_dsp( ) { GEL_MapOn( ); GEL_MapReset( ); /* RAM/ROM memory map */ GEL_MapAddStr( 0x00100000, 0, 0x00100000, "R|W|AS4", 0 ); // DSP UMAP1 ImgCop GEL_MapAddStr( 0x00800000, 0, 0x00010000, "R|W|AS4", 0 ); // DSP UMAP0( L2 Cache ) GEL_MapAddStr( 0x00E00000, 0, 0x00004000, "R|AS4", 0 ); // DSP L1P( Secure ROM ) GEL_MapAddStr( 0x00E08000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1P Cache GEL_MapAddStr( 0x00F04000, 0, 0x0000C000, "R|W|AS4", 0 ); // DSP L1D RAM GEL_MapAddStr( 0x00F10000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1D Cache /* Peripheral memory map */ GEL_MapAddStr( 0x01800000, 0, 0x00010000, "R|W|AS4", 0 ); // DSP Interrupts GEL_MapAddStr( 0x01810000, 0, 0x00001000, "R|W|AS4", 0 ); // DSP Powerdown GEL_MapAddStr( 0x01811000, 0, 0x00001000, "R|W|AS4", 0 ); // DSP Security ID GEL_MapAddStr( 0x01812000, 0, 0x00001000, "R|W|AS4", 0 ); // DSP Revision ID GEL_MapAddStr( 0x01820000, 0, 0x00010000, "R|W|AS4", 0 ); // DSP EMC GEL_MapAddStr( 0x01840000, 0, 0x00010000, "R|W|AS4", 0 ); // DSP Memory System GEL_MapAddStr( 0x01BC0000, 0, 0x00000100, "R|W|AS4", 0 ); // DSP AET Registers GEL_MapAddStr( 0x01BC0100, 0, 0x00000100, "R|W|AS4", 0 ); // DSP Pin Manager and Trace GEL_MapAddStr( 0x01C00000, 0, 0x00010000, "R|W|AS4", 0 ); // EDMA CC GEL_MapAddStr( 0x01C10000, 0, 0x00000400, "R|W|AS4", 0 ); // EDMA TC0 GEL_MapAddStr( 0x01C10400, 0, 0x00000400, "R|W|AS4", 0 ); // EDMA TC1 GEL_MapAddStr( 0x01C20000, 0, 0x00000034, "R|W|AS4", 0 ); // UART 0 GEL_MapAddStr( 0x01C20400, 0, 0x00000034, "R|W|AS4", 0 ); // UART 1 GEL_MapAddStr( 0x01C20800, 0, 0x00000034, "R|W|AS4", 0 ); // UART 2 GEL_MapAddStr( 0x01C21000, 0, 0x00000060, "R|W|AS4", 0 ); // I2C GEL_MapAddStr( 0x01C21400, 0, 0x0000002C, "R|W|AS4", 0 ); // Timer 0/1 GEL_MapAddStr( 0x01C21800, 0, 0x0000002C, "R|W|AS4", 0 ); // Timer 2/3 GEL_MapAddStr( 0x01C21C00, 0, 0x0000002C, "R|W|AS4", 0 ); // Watchdog Timer GEL_MapAddStr( 0x01C22000, 0, 0x0000001C, "R|W|AS4", 0 ); // PWM 0 GEL_MapAddStr( 0x01C22400, 0, 0x0000001C, "R|W|AS4", 0 ); // PWM 1 GEL_MapAddStr( 0x01C22800, 0, 0x0000001C, "R|W|AS4", 0 ); // PWM 2 GEL_MapAddStr( 0x01C40000, 0, 0x00000264, "R|W|AS4", 0 ); // System Module GEL_MapAddStr( 0x01C40800, 0, 0x00000174, "R|W|AS4", 0 ); // PLL 1 GEL_MapAddStr( 0x01C40C00, 0, 0x00000174, "R|W|AS4", 0 ); // PLL 2 GEL_MapAddStr( 0x01C41000, 0, 0x00000AA8, "R|W|AS4", 0 ); // Power Sleep Controller GEL_MapAddStr( 0x01C48000, 0, 0x00000050, "R|W|AS4", 0 ); // ARM Interrupts GEL_MapAddStr( 0x01C60000, 0, 0x00004000, "R|W|AS4", 0 ); // IEEE 1394 GEL_MapAddStr( 0x01C64000, 0, 0x00002000, "R|W|AS4", 0 ); // USB 2.0 OTG GEL_MapAddStr( 0x01C66000, 0, 0x00000800, "R|W|AS2", 0 ); // ATA / CF GEL_MapAddStr( 0x01C66800, 0, 0x00000074, "R|W|AS4", 0 ); // SPI GEL_MapAddStr( 0x01C67000, 0, 0x00000038, "R|W|AS4", 0 ); // GPIO GEL_MapAddStr( 0x01C67800, 0, 0x00000104, "R|W|AS4", 0 ); // UHPI GEL_MapAddStr( 0x01C70000, 0, 0x00004000, "R|W|AS4", 0 ); // VPSS GEL_MapAddStr( 0x01C80000, 0, 0x00001000, "R|W|AS4", 0 ); // EMAC Control GEL_MapAddStr( 0x01C81000, 0, 0x00001000, "R|W|AS4", 0 ); // EMAC Wrapper GEL_MapAddStr( 0x01C82000, 0, 0x00002000, "R|W|AS4", 0 ); // EMAC Wrapper RAM GEL_MapAddStr( 0x01C84000, 0, 0x00000090, "R|W|AS4", 0 ); // MDIO GEL_MapAddStr( 0x01CC0000, 0, 0x00020000, "R|W|AS4", 0 ); // Image Coprocessor GEL_MapAddStr( 0x01E00000, 0, 0x000000b4, "R|W|AS4", 0 ); // AEMIF Control GEL_MapAddStr( 0x01E01000, 0, 0x00000560, "R|W|AS4", 0 ); // VYLNQ Control GEL_MapAddStr( 0x01E02000, 0, 0x0000005C, "R|W|AS4", 0 ); // McBSP GEL_MapAddStr( 0x01E10000, 0, 0x00000078, "R|W|AS4", 0 ); // MMC / SD GEL_MapAddStr( 0x01E20000, 0, 0x00000024, "R|W|AS4", 0 ); // Memory Stick / Pro /* Off-chip memory map */ GEL_MapAddStr( 0x02000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS2 GEL_MapAddStr( 0x04000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS3 GEL_MapAddStr( 0x06000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS4 GEL_MapAddStr( 0x08000000, 0, 0x02000000, "R|W|AS4", 0 ); // AEMIF CS5 GEL_MapAddStr( 0x0C000000, 0, 0x04000000, "R|W|AS4", 0 ); // VLYNQ Remote /* ARM memory map */ GEL_MapAddStr( 0x10008000, 0, 0x00002000, "R|W|AS4", 0 ); // ARM RAM0 GEL_MapAddStr( 0x1000A000, 0, 0x00002000, "R|W|AS4", 0 ); // ARM RAM1 GEL_MapAddStr( 0x1000C000, 0, 0x00004000, "R|AS4", 0 ); // ARM ROM /* DSP RAM memory map */ GEL_MapAddStr( 0x11100000, 0, 0x00100000, "R|W|AS4", 0 ); // DSP UMAP1 ImgCop GEL_MapAddStr( 0x11800000, 0, 0x00010000, "R|W|AS4", 0 ); // DSP UMAP0 L2 Cache GEL_MapAddStr( 0x11E00000, 0, 0x00004000, "R|AS4", 0 ); // DSP L1P ROM GEL_MapAddStr( 0x11E08000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1P Cache GEL_MapAddStr( 0x11F04000, 0, 0x0000C000, "R|W|AS4", 0 ); // DSP L1D RAM GEL_MapAddStr( 0x11F10000, 0, 0x00008000, "R|W|AS4", 0 ); // DSP L1D Cache /* DDR2 memory map */ GEL_MapAddStr( 0x20000000, 0, 0x000000E8, "R|W|AS4", 0 ); // DDR2 Control GEL_MapAddStr( 0x42000000, 0, 0x0E000000, "R|W|AS4", 0 ); // AEMIF/VLYNQ Shadow GEL_MapAddStr( 0x80000000, 0, 0x10000000, "R|W|AS4", 0 ); // DDR2 SDRAM } 2008-05-13 _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
