From: Trilok Soni <[EMAIL PROTECTED]>
- This patch tries to re-organize the clocks better by
making sure that we have all clocks listed here.
- Added sysclk3 for VSS/EDMA clocks. Moved clocks structures
to clock.h.
- Added TPCC, TPTC0/1 clocks too, but I am not sure about their
rate, as I am unable to find them in documentation. So, kept
them at fixed rate.
- Introduce ENABLE_ON_INIT flag in clock structure, so it will
remove the necessity of davinci_psc_init function, which will
be removed once we agree on this patch, right now only __init
is remove from that function, and to test this patch please
remove davinci_psc_init from your board file.
- TIMER0 and TIMER1 are also kept ENABLE_ON_INIT, but I think that
time.c should follow clock framework if possible and get the rate
from it, then we many not need this flag here. I need to look at time.c
properly and make changes there.
- GPIO and USB clocks are __not__ kept as ENABLE_ON_INIT like in
davinci_psc_init.
GPIO framework and USB driver should enable them through clock framework.
Signed-off-by: Trilok Soni <[EMAIL PROTECTED]>
---
arch/arm/mach-davinci/clock.c | 90 ++++-----------------
arch/arm/mach-davinci/clock.h | 177 +++++++++++++++++++++++++++++++++++++++--
arch/arm/mach-davinci/psc.c | 2 +-
3 files changed, 187 insertions(+), 82 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index d9f3079..a127ab7 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -30,11 +30,6 @@ static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static DEFINE_SPINLOCK(clockfw_lock);
-static unsigned int commonrate;
-static unsigned int armrate;
-static unsigned int fixedrate = 27000000; /* 27 MHZ */
-
-
/*
* Returns a clock. Note that we first try to use device id on the bus
* and clock name. If this fails, we try to use clock name only.
@@ -182,70 +177,16 @@ void clk_unregister(struct clk *clk)
}
EXPORT_SYMBOL(clk_unregister);
-static struct clk davinci_clks[] = {
- {
- .name = "ARMCLK",
- .rate = &armrate,
- .lpsc = -1,
- .flags = ALWAYS_ENABLED,
- },
- {
- .name = "UART0",
- .rate = &fixedrate,
- .lpsc = DAVINCI_LPSC_UART0,
- },
- {
- .name = "UART1",
- .rate = &fixedrate,
- .lpsc = DAVINCI_LPSC_UART1,
- },
- {
- .name = "UART2",
- .rate = &fixedrate,
- .lpsc = DAVINCI_LPSC_UART2,
- },
- {
- .name = "EMACCLK",
- .rate = &commonrate,
- .lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
- },
- {
- .name = "I2CCLK",
- .rate = &fixedrate,
- .lpsc = DAVINCI_LPSC_I2C,
- },
- {
- .name = "IDECLK",
- .rate = &commonrate,
- .lpsc = DAVINCI_LPSC_ATA,
- },
- {
- .name = "McBSPCLK",
- .rate = &commonrate,
- .lpsc = DAVINCI_LPSC_McBSP,
- },
- {
- .name = "MMCSDCLK",
- .rate = &commonrate,
- .lpsc = DAVINCI_LPSC_MMC_SD,
- },
- {
- .name = "SPICLK",
- .rate = &commonrate,
- .lpsc = DAVINCI_LPSC_SPI,
- },
- {
- .name = "gpio",
- .rate = &commonrate,
- .lpsc = DAVINCI_LPSC_GPIO,
- },
- {
- .name = "AEMIFCLK",
- .rate = &commonrate,
- .lpsc = DAVINCI_LPSC_AEMIF,
- .usecount = 1,
+void clk_enable_init_clocks(void)
+{
+ struct clk *clkp;
+
+ list_for_each_entry(clkp, &clocks, node) {
+ if (clkp->flags & ENABLE_ON_INIT)
+ clk_enable(clkp);
}
-};
+}
+EXPORT_SYMBOL(clk_enable_init_clocks);
#ifdef CONFIG_DAVINCI_RESET_CLOCKS
/*
@@ -273,24 +214,23 @@ late_initcall(clk_disable_unused);
int __init davinci_clk_init(void)
{
- struct clk *clkp;
+ struct clk **clkp;
int count = 0;
u32 pll_mult;
pll_mult = davinci_readl(DAVINCI_PLL_CNTRL0_BASE + PLLM);
commonrate = ((pll_mult + 1) * 27000000) / 6;
armrate = ((pll_mult + 1) * 27000000) / 2;
+ sysclk3 = ((pll_mult + 1) * 27000000) / 3;
for (clkp = davinci_clks; count < ARRAY_SIZE(davinci_clks);
count++, clkp++) {
- clk_register(clkp);
-
- /* Turn on clocks that have been enabled in the
- * table above */
- if (clkp->usecount)
- clk_enable(clkp);
+ clk_register(*clkp);
}
+ /* Turn on the clocks required at init */
+ clk_enable_init_clocks();
+
return 0;
}
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index aaeb05c..c1b57a2 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -22,13 +22,178 @@ struct clk {
__u8 lpsc;
};
+static unsigned int commonrate;
+static unsigned int armrate, sysclk3;
+static unsigned int fixedrate = 27000000; /* 27 MHZ */
+
/* Clock flags */
-#define RATE_CKCTL 1
-#define RATE_FIXED 2
-#define RATE_PROPAGATES 4
-#define VIRTUAL_CLOCK 8
-#define ALWAYS_ENABLED 16
-#define ENABLE_REG_32BIT 32
+#define RATE_CKCTL (1 << 0)
+#define RATE_FIXED (1 << 1)
+#define RATE_PROPAGATES (1 << 2)
+#define VIRTUAL_CLOCK (1 << 3)
+#define ALWAYS_ENABLED (1 << 4)
+#define ENABLE_REG_32BIT (1 << 5)
+#define ENABLE_ON_INIT (1 << 6)
+
+static struct clk arm_ck = {
+ .name = "ARMCLK",
+ .rate = &armrate,
+ .flags = ALWAYS_ENABLED,
+ .lpsc = -1,
+};
+
+static struct clk vpss_mstr_ck = {
+ .name = "VPSSMSTR",
+ .rate = &sysclk3,
+ .lpsc = DAVINCI_LPSC_VPSSSLV,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk vpss_slv_ck = {
+ .name = "VPSSSLV",
+ .rate = &sysclk3,
+ .lpsc = DAVINCI_LPSC_VPSSSLV,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk tpcc_ck = {
+ .name = "TPCC",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_TPCC,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk tptc0_ck = {
+ .name = "TPTC0",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_TPTC0,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk tptc1_ck = {
+ .name = "TPTC1",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_TPTC1,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk timer0_ck = {
+ .name = "TIMER0",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_TIMER0,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk timer1_ck = {
+ .name = "TIMER1",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_TIMER1,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk timer2_ck = {
+ .name = "TIMER2",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_TIMER2,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk uart0_ck = {
+ .name = "UART0",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_UART0,
+};
+
+static struct clk uart1_ck = {
+ .name = "UART1",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_UART1,
+};
+
+static struct clk uart2_ck = {
+ .name = "UART2",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_UART2,
+};
+
+static struct clk emac_ck = {
+ .name = "EMACCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
+};
+
+static struct clk i2c_ck = {
+ .name = "I2CCLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_I2C,
+};
+
+static struct clk ide_ck = {
+ .name = "IDECLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_ATA,
+};
+
+static struct clk mcbsp_ck = {
+ .name = "McBSPCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_McBSP,
+};
+
+static struct clk mmcsd_ck = {
+ .name = "MMCSDCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_MMC_SD,
+};
+
+static struct clk spi_ck = {
+ .name = "SPICLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_SPI,
+};
+
+static struct clk gpio_ck = {
+ .name = "gpio",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_GPIO,
+};
+
+static struct clk aemif_ck = {
+ .name = "AEMIFCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_AEMIF,
+ .flags = ENABLE_ON_INIT,
+};
+
+static struct clk usb_ck = {
+ .name = "USBCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_USB,
+};
+
+static struct clk *davinci_clks[] __initdata = {
+ &arm_ck,
+ &vpss_mstr_ck,
+ &vpss_slv_ck,
+ &tpcc_ck,
+ &tptc0_ck,
+ &tptc1_ck,
+ &uart0_ck,
+ &uart1_ck,
+ &uart2_ck,
+ &emac_ck,
+ &i2c_ck,
+ &ide_ck,
+ &mcbsp_ck,
+ &mmcsd_ck,
+ &spi_ck,
+ &gpio_ck,
+ &aemif_ck,
+ &timer0_ck,
+ &timer1_ck,
+ &timer2_ck,
+ &usb_ck,
+};
extern void davinci_psc_config(unsigned int domain, unsigned int id,
char enable);
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index d3d8d4f..a0a2719 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -126,7 +126,7 @@ void davinci_psc_config(unsigned int domain, unsigned int
id, char enable)
davinci_psc_mux(id);
}
-void __init davinci_psc_init(void)
+void davinci_psc_init(void)
{
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSMSTR, 1);
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSSLV, 1);
--
1.5.5
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