This patch adds the clock and LPSC related changes for DM355.
Signed-off-by: Hui Geng <[EMAIL PROTECTED]>
---
arch/arm/mach-davinci/clock.c | 225 +++++++++++++++++++++++++++++++++---
include/asm-arm/arch-davinci/psc.h | 5 +
2 files changed, 212 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 6ba8be0..d7db216 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -186,7 +186,7 @@ void clk_unregister(struct clk *clk)
}
EXPORT_SYMBOL(clk_unregister);
-static struct clk davinci_clks[] = {
+static struct clk davinci_dm644x_clks[] = {
{
.name = "ARMCLK",
.rate = &armrate,
@@ -199,16 +199,6 @@ static struct clk davinci_clks[] = {
.lpsc = DAVINCI_LPSC_UART0,
},
{
- .name = "UART1",
- .rate = &fixedrate,
- .lpsc = DAVINCI_LPSC_UART1,
- },
- {
- .name = "UART2",
- .rate = &fixedrate,
- .lpsc = DAVINCI_LPSC_UART2,
- },
- {
.name = "EMACCLK",
.rate = &commonrate,
.lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
@@ -226,12 +216,12 @@ static struct clk davinci_clks[] = {
{
.name = "McBSPCLK",
.rate = &commonrate,
- .lpsc = DAVINCI_LPSC_McBSP,
+ .lpsc = DAVINCI_LPSC_McBSP0,
},
{
- .name = "MMCSDCLK",
+ .name = "MMCSDCLK0",
.rate = &commonrate,
- .lpsc = DAVINCI_LPSC_MMC_SD,
+ .lpsc = DAVINCI_LPSC_MMC_SD0,
},
{
.name = "SPICLK",
@@ -248,7 +238,32 @@ static struct clk davinci_clks[] = {
.rate = &commonrate,
.lpsc = DAVINCI_LPSC_AEMIF,
.usecount = 1,
- }
+ },
+ {
+ .name = "PWM0_CLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_PWM0,
+ },
+ {
+ .name = "PWM1_CLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_PWM1,
+ },
+ {
+ .name = "PWM2_CLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_PWM2,
+ },
+ {
+ .name = "USBCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_USB,
+ },
+ {
+ .name = "VLYNQ_CLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_VLYNQ,
+ },
};
static struct clk davinci_dm6467_clks[] = {
{
@@ -273,11 +288,36 @@ static struct clk davinci_dm6467_clks[] = {
.lpsc = DAVINCI_DM646X_LPSC_UART2,
},
{
+ .name = "EMACCLK",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_EMAC,
+ },
+ {
.name = "I2CCLK",
.rate = &div_by_four,
.lpsc = DAVINCI_DM646X_LPSC_I2C,
},
{
+ .name = "IDECLK",
+ .rate = &div_by_six,
+ .lpsc = DAVINCI_LPSC_ATA,
+ },
+ {
+ .name = "McASPCLK0",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_McASP0,
+ },
+ {
+ .name = "McASPCLK1",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_McASP1,
+ },
+ {
+ .name = "SPICLK",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_SPI,
+ },
+ {
.name = "gpio",
.rate = &commonrate,
.lpsc = DAVINCI_DM646X_LPSC_GPIO,
@@ -288,6 +328,133 @@ static struct clk davinci_dm6467_clks[] = {
.lpsc = DAVINCI_DM646X_LPSC_AEMIF,
.usecount = 1,
},
+ {
+ .name = "PWM0_CLK",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_PWM0,
+ },
+ {
+ .name = "PWM1_CLK",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_PWM1,
+ },
+ {
+ .name = "USBCLK",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_LPSC_USB,
+ },
+ {
+ .name = "VLYNQ_CLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_VLYNQ,
+ },
+ {
+ .name = "TSIF0_CLK",
+ .lpsc = DAVINCI_DM646X_LPSC_TSIF0,
+ },
+ {
+ .name = "TSIF1_CLK",
+ .lpsc = DAVINCI_DM646X_LPSC_TSIF1,
+ },
+};
+static struct clk davinci_dm355_clks[] = {
+ {
+ .name = "ARMCLK",
+ .rate = &armrate,
+ .lpsc = -1,
+ .flags = ALWAYS_ENABLED,
+ },
+ {
+ .name = "UART0",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_UART0,
+ },
+ {
+ .name = "UART1",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_UART1,
+ },
+ {
+ .name = "UART2",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_UART2,
+ },
+ {
+ .name = "EMACCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
+ },
+ {
+ .name = "I2CCLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_I2C,
+ },
+ {
+ .name = "IDECLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_ATA,
+ },
+ {
+ .name = "McBSPCLK0",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_McBSP0,
+ },
+ {
+ .name = "McBSPCLK1",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_McBSP1,
+ },
+ {
+ .name = "MMCSDCLK0",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_MMC_SD0,
+ },
+ {
+ .name = "MMCSDCLK1",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_MMC_SD1,
+ },
+ {
+ .name = "SPICLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_SPI,
+ },
+ {
+ .name = "gpio",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_GPIO,
+ },
+ {
+ .name = "AEMIFCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_AEMIF,
+ .usecount = 1,
+ },
+ {
+ .name = "PWM0_CLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_PWM0,
+ },
+ {
+ .name = "PWM1_CLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_PWM1,
+ },
+ {
+ .name = "PWM2_CLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_PWM2,
+ },
+ {
+ .name = "PWM3_CLK",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_LPSC_PWM3,
+ },
+ {
+ .name = "USBCLK",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_LPSC_USB,
+ },
};
#ifdef CONFIG_DAVINCI_RESET_CLOCKS
@@ -325,7 +492,28 @@ int __init davinci_clk_init(void)
commonrate = ((pll_mult + 1) * 27000000) / 6;
armrate = ((pll_mult + 1) * 27000000) / 2;
- if (cpu_is_davinci_dm6467()) {
+ if (cpu_is_davinci_dm355()) {
+ /*
+ * FIXME
+ * We're assuming a 24MHz reference, but the DM355 also
+ * supports a 36MHz reference.
+ */
+ unsigned long postdiv;
+
+ /*
+ * Read the PLL1 POSTDIV register to determine if the post
+ * divider is /1 or /2
+ */
+ postdiv = (davinci_readl(DAVINCI_PLL_CNTRL0_BASE + 0x128)
+ & 0x1f) + 1;
+
+ fixedrate = 24000000;
+ armrate = (pll_mult + 1) * (fixedrate / (16 * postdiv));
+ commonrate = armrate / 2;
+
+ board_clks = davinci_dm355_clks;
+ num_clks = ARRAY_SIZE(davinci_dm355_clks);
+ } else if (cpu_is_davinci_dm6467()) {
fixedrate = 24000000;
div_by_four = ((pll_mult + 1) * 27000000) / 4;
div_by_six = ((pll_mult + 1) * 27000000) / 6;
@@ -335,12 +523,13 @@ int __init davinci_clk_init(void)
board_clks = davinci_dm6467_clks;
num_clks = ARRAY_SIZE(davinci_dm6467_clks);
} else {
+
fixedrate = 27000000;
armrate = (pll_mult + 1) * (fixedrate / 2);
commonrate = armrate / 3;
- board_clks = davinci_clks;
- num_clks = ARRAY_SIZE(davinci_clks);
+ board_clks = davinci_dm644x_clks;
+ num_clks = ARRAY_SIZE(davinci_dm644x_clks);
}
for (clkp = board_clks; count < num_clks; count++, clkp++) {
diff --git a/include/asm-arm/arch-davinci/psc.h
b/include/asm-arm/arch-davinci/psc.h
index 4977aa0..891017b 100644
--- a/include/asm-arm/arch-davinci/psc.h
+++ b/include/asm-arm/arch-davinci/psc.h
@@ -39,16 +39,21 @@
#define DAVINCI_LPSC_EMAC 5
#define DAVINCI_LPSC_EMAC_WRAPPER 6
#define DAVINCI_LPSC_MDIO 7
+#define DAVINCI_LPSC_MMC_SD1 7
#define DAVINCI_LPSC_IEEE1394 8
+#define DAVINCI_LPSC_McBSP1 8
#define DAVINCI_LPSC_USB 9
#define DAVINCI_LPSC_ATA 10
+#define DAVINCI_LPSC_PWM3 10
#define DAVINCI_LPSC_VLYNQ 11
#define DAVINCI_LPSC_UHPI 12
#define DAVINCI_LPSC_DDR_EMIF 13
#define DAVINCI_LPSC_AEMIF 14
#define DAVINCI_LPSC_MMC_SD 15
+#define DAVINCI_LPSC_MMC_SD0 15
#define DAVINCI_LPSC_MEMSTICK 16
#define DAVINCI_LPSC_McBSP 17
+#define DAVINCI_LPSC_McBSP0 17
#define DAVINCI_LPSC_I2C 18
#define DAVINCI_LPSC_UART0 19
#define DAVINCI_LPSC_UART1 20
--
1.5.4.3
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