Adds clock related changes for dm6467.
Signed-off-by: Sudhakar Rajashekhara <[EMAIL PROTECTED]>
---
arch/arm/mach-davinci/clock.c | 74 ++++++++++++++++++++++++++++++++++++++---
arch/arm/mach-davinci/time.c | 13 +++++--
2 files changed, 79 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 3a8754b..6e56830 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -21,16 +21,23 @@
#include <asm/io.h>
#include <mach/psc.h>
+#include <mach/cpu.h>
#include "clock.h"
/* PLL/Reset register offsets */
#define PLLM 0x110
+/* Oscillation Frequency */
+#define OSC_FREQ 27000000 /* 27 MHZ */
+
static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static DEFINE_SPINLOCK(clockfw_lock);
static unsigned int commonrate;
+static unsigned int div_by_four;
+static unsigned int div_by_six;
+static unsigned int div_by_eight;
static unsigned int armrate;
static unsigned int fixedrate = 27000000; /* 27 MHZ */
@@ -247,6 +254,45 @@ static struct clk davinci_clks[] = {
.usecount = 1,
}
};
+static struct clk davinci_dm6467_clks[] = {
+ {
+ .name = "ARMCLK",
+ .rate = &armrate,
+ .lpsc = -1,
+ .flags = ALWAYS_ENABLED,
+ },
+ {
+ .name = "UART0",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_DM646X_LPSC_UART0,
+ },
+ {
+ .name = "UART1",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_DM646X_LPSC_UART1,
+ },
+ {
+ .name = "UART2",
+ .rate = &fixedrate,
+ .lpsc = DAVINCI_DM646X_LPSC_UART2,
+ },
+ {
+ .name = "I2CCLK",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_I2C,
+ },
+ {
+ .name = "gpio",
+ .rate = &commonrate,
+ .lpsc = DAVINCI_DM646X_LPSC_GPIO,
+ },
+ {
+ .name = "AEMIFCLK",
+ .rate = &div_by_four,
+ .lpsc = DAVINCI_DM646X_LPSC_AEMIF,
+ .usecount = 1,
+ },
+};
#ifdef CONFIG_DAVINCI_RESET_CLOCKS
/*
@@ -275,15 +321,33 @@ late_initcall(clk_disable_unused);
int __init davinci_clk_init(void)
{
struct clk *clkp;
- int count = 0;
+ static struct clk *board_clks;
+ int count = 0, num_clks;
u32 pll_mult;
pll_mult = davinci_readl(DAVINCI_PLL_CNTRL0_BASE + PLLM);
- commonrate = ((pll_mult + 1) * 27000000) / 6;
- armrate = ((pll_mult + 1) * 27000000) / 2;
+ commonrate = ((pll_mult + 1) * OSC_FREQ) / 6;
+ armrate = ((pll_mult + 1) * OSC_FREQ) / 2;
+
+ if (cpu_is_davinci_dm6467()) {
+ fixedrate = 24000000;
+ div_by_four = ((pll_mult + 1) * OSC_FREQ) / 4;
+ div_by_six = ((pll_mult + 1) * OSC_FREQ) / 6;
+ div_by_eight = ((pll_mult + 1) * OSC_FREQ) / 8;
+ armrate = ((pll_mult + 1) * OSC_FREQ) / 2;
+
+ board_clks = davinci_dm6467_clks;
+ num_clks = ARRAY_SIZE(davinci_dm6467_clks);
+ } else {
+ fixedrate = OSC_FREQ;
+ armrate = (pll_mult + 1) * (fixedrate / 2);
+ commonrate = armrate / 3;
+
+ board_clks = davinci_clks;
+ num_clks = ARRAY_SIZE(davinci_clks);
+ }
- for (clkp = davinci_clks; count < ARRAY_SIZE(davinci_clks);
- count++, clkp++) {
+ for (clkp = board_clks; count < num_clks; count++, clkp++) {
clk_register(clkp);
/* Turn on clocks that have been enabled in the
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 206e80d..7b17225 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -24,8 +24,10 @@
#include <asm/mach/time.h>
#include <asm/errno.h>
#include <mach/io.h>
+#include <mach/cpu.h>
static struct clock_event_device clockevent_davinci;
+static unsigned int davinci_clock_tick_rate;
#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
#define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800)
@@ -274,7 +276,7 @@ static void davinci_set_mode(enum clock_event_mode mode,
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
- t->period = CLOCK_TICK_RATE / (HZ);
+ t->period = davinci_clock_tick_rate / (HZ);
t->opts = TIMER_OPTS_PERIODIC;
timer32_config(t);
break;
@@ -307,15 +309,20 @@ static void __init davinci_timer_init(void)
/* init timer hw */
timer_init();
+ if (cpu_is_davinci_dm644x())
+ davinci_clock_tick_rate = 27000000;
+ else if (cpu_is_davinci_dm6467())
+ davinci_clock_tick_rate = 148500000;
+
/* setup clocksource */
clocksource_davinci.mult =
- clocksource_khz2mult(CLOCK_TICK_RATE/1000,
+ clocksource_khz2mult(davinci_clock_tick_rate/1000,
clocksource_davinci.shift);
if (clocksource_register(&clocksource_davinci))
printk(err, clocksource_davinci.name);
/* setup clockevent */
- clockevent_davinci.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
+ clockevent_davinci.mult = div_sc(davinci_clock_tick_rate, NSEC_PER_SEC,
clockevent_davinci.shift);
clockevent_davinci.max_delta_ns =
clockevent_delta2ns(0xfffffffe, &clockevent_davinci);
--
1.5.4.1
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