I'm trying to enable deep sleep on a DM355 and I'd like to know if
anyone else has done that?
I think that I've been able to enter and exit deep sleep mode
successfully as I see the power draw on my system drop from 650 mW down
to 190 mW when I'm in deep sleep.
There's very little hard information on how much power the DM355 should
draw in deep sleep mode. I've found a Power Point presentation on the
net at:
http://www.arrownac.com/manufacturers/texas-instruments/npi/products/dm355/davinci-dm355.ppt
that states that the power consumption should be less that 5 mW while
it's in deep sleep.
I've also found a FAQ from TI that states that it should be approx 1 mW:
http://focus.ti.com.cn/cn/lit/ml/sprv063a/sprv063a.pdf
Assuming that the DM355 is in deep sleep mode and is really drawing
around 5 mW, when I add in the maximum power draw from the other major
components on my system, I'm still pretty far away from from what I'd
expect the system to be drawing.
The documentation in the Arm Subsystems User Guide (SPRUFB3) section
12.5.1 states:
The transition of GIO0 from high to low creates a clock pulse
advancing the Deep Sleep state machine. After this transition, all
clocks are stopped and then the internal oscillators are powered down.
I may be misunderstanding that statement, but I took it to mean that the
system is in it's lowest power state at that point. I suspect that that
may not be entirely true. I found that the VPSS oscillator, OTG analog
block and USB PHY are still powered on. Turning those off saves about
12 mW.
I suspect that other areas of the DM355 are still drawing power. Does
anyone know of other areas of the chip that should be powered off
separately prior to entering deep sleep?
I've tried turning off the VPSS_Master and VPSS_Slave using the PSC
controller, but that didn't have any noticeable effect.
Does the PSC have any effect on power consumption when the system is in
deep sleep mode?
Does anyone know if the DSP side goes to sleep when you enter deep sleep?
I've also noticed that the amount of power that the system consumes can
very quite a bit between various deep sleeps. Using a software load
that boots the kernel and puts the system to sleep, I've seen as much as
31 mW variance between boots once the system has entered deep sleep.
I've yet to figure that one out.
Any ideas on things to try or look into would be appreciated.
thanks,
Jeff
--
Jeff Cooper // senior embedded software engineer
LOGIC // engineering design services
411 Washington Ave. N. Suite 400
Minneapolis, MN 55401
T // 612.436.5176
F // 612.672.9489
[EMAIL PROTECTED]
www.logicpd.com
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