Hi, I've some problems with interfacing a sensor with the CCDC of a DM355 powered custom board and a mv4.01 kernel.
I'm still not receiving any interrupt, and I'm figuring out why. So, I'm trying to decode the STADRH and STADRL registers: I noted that if v4l call the ccdc driver with an address (let's say: 0x86000000 ), it went transformed in 0x30 inside STADRH and 0x0 in STADRL... So, the questions are: - why 0x30?? when the DDR EMIF offset should be only 0x80000000 ?? Shouldn't it be 0x600 ? Am i missing some steps? - after that, how can I see if the CCDC is writing something on memory? That could help me in distinguish if the problem is the irq, or the whole transfer. ( let's assume that the sensor works well...) I tried to read /dev/mem at offsets 0x86000000, 0x6000000, 0x300000 but it doens't work (it segfaults). Thanks, bye! -- Andrea Gasparini ---- ImaVis S.r.l. ---- web: www.imavis.com _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
