[EMAIL PROTECTED] writes:
> From: Naresh Medisetty <[EMAIL PROTECTED]>
>
> Fixes the audio stall problem when doing playback and capture at the same
> time.
>
Naresh,
This DaVinci ASoC driver is in mainline. Please submit these two ASoc
patches to the alsa-devel list (and CC here.) If it gets accepted
there, I will also merge it into DaVinci git until I merge again with
mainline.
Kevin
> Signed-off-by: Naresh Medisetty <[EMAIL PROTECTED]>
> ---
> sound/soc/davinci/davinci-i2s.c | 35 ++++++++++++++++++++++++-----------
> 1 files changed, 24 insertions(+), 11 deletions(-)
>
> diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
> index d8279ad..8b29463 100644
> --- a/sound/soc/davinci/davinci-i2s.c
> +++ b/sound/soc/davinci/davinci-i2s.c
> @@ -262,17 +262,30 @@ static int davinci_i2s_hw_params(struct
> snd_pcm_substream *substream,
> u32 w;
>
> /* general line settings */
> - davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG,
> - DAVINCI_MCBSP_SPCR_RINTM(3) |
> - DAVINCI_MCBSP_SPCR_XINTM(3) |
> - DAVINCI_MCBSP_SPCR_FREE);
> - davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG,
> - DAVINCI_MCBSP_RCR_RFRLEN1(1) |
> - DAVINCI_MCBSP_RCR_RDATDLY(1));
> - davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG,
> - DAVINCI_MCBSP_XCR_XFRLEN1(1) |
> - DAVINCI_MCBSP_XCR_XDATDLY(1) |
> - DAVINCI_MCBSP_XCR_XFIG);
> + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
> +
> + w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
> + w |= (DAVINCI_MCBSP_SPCR_RINTM(3) | DAVINCI_MCBSP_SPCR_FREE);
> + davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
> +
> + w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_RCR_REG);
> + w |= (DAVINCI_MCBSP_RCR_RFRLEN1(1) |
> + DAVINCI_MCBSP_RCR_RDATDLY(1));
> + davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG, w);
> +
> + } else {
> +
> + w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
> + w |= DAVINCI_MCBSP_SPCR_XINTM(3) | DAVINCI_MCBSP_SPCR_FREE;
> + davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
> +
> + w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_XCR_REG);
> + w |= (DAVINCI_MCBSP_XCR_XFRLEN1(1) |
> + DAVINCI_MCBSP_XCR_XDATDLY(1) |
> + DAVINCI_MCBSP_XCR_XFIG);
> + davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG, w);
> +
> + }
>
> i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS);
> w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SRGR_REG);
> --
> 1.5.4.1
>
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