This is a testing patch that still needs
broken into smaller chunks. It is compile
tested for the davinci_evm_dm644x_defconfig
only. I expect that the patch will reduce
pops and eliminate underrun audio issues
on the evm. The previously sent
dma patch set needs applied before this.
Specificly, davinci_pause_dma and davinci_resume_dma
are needed from that set.
Thanks for testing :^)
Signed-off-by: Troy Kisky <[EMAIL PROTECTED]>
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 368eb4d..9ee1f77 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -1286,6 +1286,7 @@ void davinci_pause_dma(int lch)
edma_shadow0_write_array(SH_EECR, lch >> 5, mask);
}
}
+EXPORT_SYMBOL(davinci_pause_dma);
/*
* DMA resume - resumes the dma on the channel passed
*/
@@ -1296,6 +1297,7 @@ void davinci_resume_dma(int lch)
edma_shadow0_write_array(SH_EESR, lch >> 5, mask);
}
}
+EXPORT_SYMBOL(davinci_resume_dma);
/******************************************************************************
*
* DMA Start - Starts the dma on the channel passed
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 5e01898..5bd9fdc 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -358,6 +358,7 @@ struct snd_soc_dai_ops {
/* digital mute */
int (*digital_mute)(struct snd_soc_dai *dai, int mute);
+ int (*inform_channel_order)(struct snd_soc_dai *dai, int right_first);
};
/* SoC DAI (Digital Audio Interface) */
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index e2e0b9e..f087e3f 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -38,14 +38,14 @@ static int evm_hw_params(struct snd_pcm_substream
*substream,
int ret = 0;
/* set codec DAI configuration */
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_A |
SND_SOC_DAIFMT_CBM_CFM);
if (ret < 0)
return ret;
/* set cpu DAI configuration */
- ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBM_CFM |
- SND_SOC_DAIFMT_IB_NF);
+ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_A |
+ SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF);
if (ret < 0)
return ret;
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index 11c20d0..f241b99 100644
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -35,6 +35,7 @@
#define DAVINCI_MCBSP_SPCR_RRST (1 << 0)
#define DAVINCI_MCBSP_SPCR_RINTM(v) ((v) << 4)
#define DAVINCI_MCBSP_SPCR_XRST (1 << 16)
+#define DAVINCI_MCBSP_SPCR_XSYNCERR (1 << 19)
#define DAVINCI_MCBSP_SPCR_XINTM(v) ((v) << 20)
#define DAVINCI_MCBSP_SPCR_GRST (1 << 22)
#define DAVINCI_MCBSP_SPCR_FRST (1 << 23)
@@ -43,13 +44,18 @@
#define DAVINCI_MCBSP_RCR_RWDLEN1(v) ((v) << 5)
#define DAVINCI_MCBSP_RCR_RFRLEN1(v) ((v) << 8)
#define DAVINCI_MCBSP_RCR_RDATDLY(v) ((v) << 16)
+#define DAVINCI_MCBSP_RCR_RFIG (1 << 18)
#define DAVINCI_MCBSP_RCR_RWDLEN2(v) ((v) << 21)
+#define DAVINCI_MCBSP_RCR_RFRLEN2(v) ((v) << 24)
+#define DAVINCI_MCBSP_RCR_RPHASE (1 << 31)
#define DAVINCI_MCBSP_XCR_XWDLEN1(v) ((v) << 5)
#define DAVINCI_MCBSP_XCR_XFRLEN1(v) ((v) << 8)
#define DAVINCI_MCBSP_XCR_XDATDLY(v) ((v) << 16)
#define DAVINCI_MCBSP_XCR_XFIG (1 << 18)
#define DAVINCI_MCBSP_XCR_XWDLEN2(v) ((v) << 21)
+#define DAVINCI_MCBSP_XCR_XFRLEN2(v) ((v) << 24)
+#define DAVINCI_MCBSP_XCR_XPHASE (1 << 31)
#define DAVINCI_MCBSP_SRGR_FWID(v) ((v) << 8)
#define DAVINCI_MCBSP_SRGR_FPER(v) ((v) << 16)
@@ -65,13 +71,6 @@
#define DAVINCI_MCBSP_PCR_FSRM (1 << 10)
#define DAVINCI_MCBSP_PCR_FSXM (1 << 11)
-#define MOD_REG_BIT(val, mask, set) do { \
- if (set) { \
- val |= mask; \
- } else { \
- val &= ~mask; \
- } \
-} while (0)
enum {
DAVINCI_MCBSP_WORD_8 = 0,
@@ -92,8 +91,13 @@ static struct davinci_pcm_dma_params davinci_i2s_pcm_in = {
struct davinci_mcbsp_dev {
void __iomem *base;
+#define MOD_DSP_A 0
+#define MOD_DSP_B 1
+ int mode;
+ u32 pcr;
struct clk *clk;
struct davinci_pcm_dma_params *dma_params[2];
+ struct snd_soc_dai *codec_dai;
};
static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev,
@@ -107,25 +111,40 @@ static inline u32 davinci_mcbsp_read_reg(struct
davinci_mcbsp_dev *dev, int reg)
return __raw_readl(dev->base + reg);
}
-static void davinci_mcbsp_start(struct snd_pcm_substream *substream)
+static void davinci_mcbsp_start(struct davinci_mcbsp_dev *dev,
+ struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data;
struct snd_soc_device *socdev = rtd->socdev;
struct snd_soc_platform *platform = socdev->platform;
u32 w;
- int ret;
-
- /* Start the sample generator and enable transmitter/receiver */
+ u32 mask = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+ DAVINCI_MCBSP_SPCR_XRST : DAVINCI_MCBSP_SPCR_RRST;
+ u32 m = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+ DAVINCI_MCBSP_PCR_CLKXP : DAVINCI_MCBSP_PCR_CLKRP;
w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_GRST, 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
+ if (w & mask) {
+ /* start off disabled */
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w & ~mask);
+ /* The clock needs to toggle to complete reset.
+ * So, fake it by toggling the clk polarity.
+ */
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG,
+ dev->pcr ^ m);
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, dev->pcr);
+ }
+ if (dev->pcr & (DAVINCI_MCBSP_PCR_FSXM | DAVINCI_MCBSP_PCR_FSRM |
+ DAVINCI_MCBSP_PCR_CLKXM | DAVINCI_MCBSP_PCR_CLKRM)) {
+ /* Start the sample generator */
+ w |= DAVINCI_MCBSP_SPCR_GRST;
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
+ }
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
/* Stop the DMA to avoid data loss */
/* while the transmitter is out of reset to handle XSYNCERR */
if (platform->pcm_ops->trigger) {
- ret = platform->pcm_ops->trigger(substream,
+ int ret = platform->pcm_ops->trigger(substream,
SNDRV_PCM_TRIGGER_STOP);
if (ret < 0)
printk(KERN_DEBUG "Playback DMA stop failed\n");
@@ -133,7 +152,7 @@ static void davinci_mcbsp_start(struct snd_pcm_substream
*substream)
/* Enable the transmitter */
w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 1);
+ w |= DAVINCI_MCBSP_SPCR_XRST;
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
/* wait for any unexpected frame sync error to occur */
@@ -141,117 +160,138 @@ static void davinci_mcbsp_start(struct
snd_pcm_substream *substream)
/* Disable the transmitter to clear any outstanding XSYNCERR */
w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 0);
+ w &= ~DAVINCI_MCBSP_SPCR_XRST;
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
+ /* The clock needs to toggle to complete reset.
+ * So, fake it by toggling the clk polarity.
+ */
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG,
+ dev->pcr ^ m);
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, dev->pcr);
/* Restart the DMA */
if (platform->pcm_ops->trigger) {
- ret = platform->pcm_ops->trigger(substream,
+ int ret = platform->pcm_ops->trigger(substream,
SNDRV_PCM_TRIGGER_START);
if (ret < 0)
printk(KERN_DEBUG "Playback DMA start
failed\n");
}
- /* Enable the transmitter */
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
-
- } else {
-
- /* Enable the reciever */
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_RRST, 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
}
-
- /* Start frame sync */
+ /* Enable transmitter or receiver */
w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_FRST, 1);
+ w |= mask;
+
+ if (dev->pcr & (DAVINCI_MCBSP_PCR_FSXM | DAVINCI_MCBSP_PCR_FSRM)) {
+ /* Start frame sync */
+ w |= DAVINCI_MCBSP_SPCR_FRST;
+ }
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
}
-static void davinci_mcbsp_stop(struct snd_pcm_substream *substream)
+static void davinci_mcbsp_stop(struct davinci_mcbsp_dev *dev, int playback)
{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data;
u32 w;
+ u32 m = playback ? DAVINCI_MCBSP_PCR_CLKXP : DAVINCI_MCBSP_PCR_CLKRP;
/* Reset transmitter/receiver and sample rate/frame sync generators */
w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_GRST |
- DAVINCI_MCBSP_SPCR_FRST, 0);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 0);
- else
- MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_RRST, 0);
+ w &= ~(DAVINCI_MCBSP_SPCR_GRST | DAVINCI_MCBSP_SPCR_FRST);
+ w &= (playback) ? ~DAVINCI_MCBSP_SPCR_XRST : ~DAVINCI_MCBSP_SPCR_RRST;
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
+ /* The clock needs to toggle to complete reset.
+ * So, fake it by toggling the clk polarity.
+ */
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, dev->pcr ^ m);
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, dev->pcr);
}
static int davinci_i2s_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
- struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data;
+ struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
cpu_dai->dma_data = dev->dma_params[substream->stream];
return 0;
}
+
+#define DEFAULT_BITPERSAMPLE 16
+
static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
unsigned int fmt)
{
struct davinci_mcbsp_dev *dev = cpu_dai->private_data;
- u32 w;
+ unsigned int pcr;
+ unsigned int srgr;
+ srgr = DAVINCI_MCBSP_SRGR_FSGM |
+ DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) |
+ DAVINCI_MCBSP_SRGR_FWID(DEFAULT_BITPERSAMPLE - 1);
+ /* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG,
- DAVINCI_MCBSP_PCR_FSXM |
- DAVINCI_MCBSP_PCR_FSRM |
- DAVINCI_MCBSP_PCR_CLKXM |
- DAVINCI_MCBSP_PCR_CLKRM);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG,
- DAVINCI_MCBSP_SRGR_FSGM);
+ /* cpu is master */
+ pcr = DAVINCI_MCBSP_PCR_FSXM |
+ DAVINCI_MCBSP_PCR_FSRM |
+ DAVINCI_MCBSP_PCR_CLKXM |
+ DAVINCI_MCBSP_PCR_CLKRM;
break;
case SND_SOC_DAIFMT_CBM_CFS:
/* McBSP CLKR pin is the input for the Sample Rate Generator.
* McBSP FSR and FSX are driven by the Sample Rate Generator. */
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG,
- DAVINCI_MCBSP_PCR_SCLKME |
- DAVINCI_MCBSP_PCR_FSXM |
- DAVINCI_MCBSP_PCR_FSRM);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG,
- DAVINCI_MCBSP_SRGR_FSGM);
+ pcr = DAVINCI_MCBSP_PCR_SCLKME |
+ DAVINCI_MCBSP_PCR_FSXM |
+ DAVINCI_MCBSP_PCR_FSRM;
break;
case SND_SOC_DAIFMT_CBM_CFM:
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, 0);
+ /* codec is master */
+ pcr = 0;
break;
default:
+ printk(KERN_ERR "%s:bad master\n", __func__);
return -EINVAL;
}
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_IB_NF:
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_PCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_PCR_CLKXP |
- DAVINCI_MCBSP_PCR_CLKRP, 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, w);
+ /* CLKRP Receive clock polarity,
+ * 1 - sampled on rising edge of CLKR
+ * valid on rising edge
+ * CLKXP Transmit clock polarity,
+ * 1 - clocked on falling edge of CLKX
+ * valid on rising edge
+ * FSRP Receive frame sync pol, 0 - active high
+ * FSXP Transmit frame sync pol, 0 - active high
+ */
+ pcr |= (DAVINCI_MCBSP_PCR_CLKXP | DAVINCI_MCBSP_PCR_CLKRP);
break;
case SND_SOC_DAIFMT_NB_IF:
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_PCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_PCR_FSXP |
- DAVINCI_MCBSP_PCR_FSRP, 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, w);
+ /* CLKRP Receive clock polarity,
+ * 0 - sampled on falling edge of CLKR
+ * valid on falling edge
+ * CLKXP Transmit clock polarity,
+ * 0 - clocked on rising edge of CLKX
+ * valid on falling edge
+ * FSRP Receive frame sync pol, 1 - active low
+ * FSXP Transmit frame sync pol, 1 - active low
+ */
+ pcr |= (DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP);
break;
case SND_SOC_DAIFMT_IB_IF:
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_PCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_PCR_CLKXP |
- DAVINCI_MCBSP_PCR_CLKRP |
- DAVINCI_MCBSP_PCR_FSXP |
- DAVINCI_MCBSP_PCR_FSRP, 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, w);
+ /* CLKRP Receive clock polarity,
+ * 1 - sampled on rising edge of CLKR
+ * valid on rising edge
+ * CLKXP Transmit clock polarity,
+ * 1 - clocked on falling edge of CLKX
+ * valid on rising edge
+ * FSRP Receive frame sync pol, 1 - active low
+ * FSXP Transmit frame sync pol, 1 - active low
+ */
+ pcr |= (DAVINCI_MCBSP_PCR_CLKXP | DAVINCI_MCBSP_PCR_CLKRP |
+ DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP);
break;
case SND_SOC_DAIFMT_NB_NF:
break;
@@ -259,28 +299,21 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai
*cpu_dai,
return -EINVAL;
}
+ /* interface format */
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
- case SND_SOC_DAIFMT_RIGHT_J:
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG,
- DAVINCI_MCBSP_RCR_RFRLEN1(1) |
- DAVINCI_MCBSP_RCR_RDATDLY(0));
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG,
- DAVINCI_MCBSP_XCR_XFRLEN1(1) |
- DAVINCI_MCBSP_XCR_XDATDLY(0) |
- DAVINCI_MCBSP_XCR_XFIG);
+ case SND_SOC_DAIFMT_DSP_A:
+ dev->mode = MOD_DSP_A;
break;
- case SND_SOC_DAIFMT_I2S:
- default:
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG,
- DAVINCI_MCBSP_RCR_RFRLEN1(1) |
- DAVINCI_MCBSP_RCR_RDATDLY(1));
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG,
- DAVINCI_MCBSP_XCR_XFRLEN1(1) |
- DAVINCI_MCBSP_XCR_XDATDLY(1) |
- DAVINCI_MCBSP_XCR_XFIG);
+ case SND_SOC_DAIFMT_DSP_B:
+ dev->mode = MOD_DSP_B;
break;
+ default:
+ printk(KERN_ERR "%s:bad format\n", __func__);
+ return -EINVAL;
}
-
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr);
+ dev->pcr = pcr;
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, pcr);
return 0;
}
@@ -290,93 +323,180 @@ static int davinci_i2s_hw_params(struct
snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct davinci_pcm_dma_params *dma_params = rtd->dai->cpu_dai->dma_data;
struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data;
+ struct snd_soc_dai *codec_dai = dev->codec_dai;
struct snd_interval *i = NULL;
int mcbsp_word_length;
+ int bits_per_sample;
+ int bits_per_frame;
+ unsigned int rcr, xcr, srgr;
+ int channels;
+ int format;
+ int element_cnt = 1;
u32 w;
+ int right_first = 0;
+
+ i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS);
+ bits_per_sample = snd_interval_value(i);
+ i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_FRAME_BITS);
+ bits_per_frame = snd_interval_value(i);
+ srgr = DAVINCI_MCBSP_SRGR_FSGM |
+ DAVINCI_MCBSP_SRGR_FPER(bits_per_frame - 1) |
+ DAVINCI_MCBSP_SRGR_FWID(bits_per_sample - 1);
/* general line settings */
w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
- if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
- w |= DAVINCI_MCBSP_SPCR_RINTM(3) | DAVINCI_MCBSP_SPCR_FREE;
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
+ w |= DAVINCI_MCBSP_SPCR_FREE;
+ w |= (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+ DAVINCI_MCBSP_SPCR_XINTM(3) :
+ DAVINCI_MCBSP_SPCR_RINTM(3);
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
+
+ rcr = DAVINCI_MCBSP_RCR_RFIG;
+ xcr = DAVINCI_MCBSP_XCR_XFIG;
+ if (dev->mode == MOD_DSP_A) {
+ rcr |= DAVINCI_MCBSP_RCR_RDATDLY(0);
+ xcr |= DAVINCI_MCBSP_XCR_XDATDLY(0);
} else {
- w |= DAVINCI_MCBSP_SPCR_XINTM(3) | DAVINCI_MCBSP_SPCR_FREE;
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w);
+ rcr |= DAVINCI_MCBSP_RCR_RDATDLY(1);
+ xcr |= DAVINCI_MCBSP_XCR_XDATDLY(1);
}
-
- i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS);
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SRGR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SRGR_FWID(snd_interval_value(i) - 1), 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, w);
-
- i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_FRAME_BITS);
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SRGR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_SRGR_FPER(snd_interval_value(i) - 1), 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, w);
-
+ channels = params_channels(params);
+ format = params_format(params);
/* Determine xfer data type */
- switch (params_format(params)) {
- case SNDRV_PCM_FORMAT_S8:
- dma_params->data_type = 1;
- mcbsp_word_length = DAVINCI_MCBSP_WORD_8;
- break;
- case SNDRV_PCM_FORMAT_S16_LE:
- dma_params->data_type = 2;
- mcbsp_word_length = DAVINCI_MCBSP_WORD_16;
- break;
- case SNDRV_PCM_FORMAT_S32_LE:
- dma_params->data_type = 4;
- mcbsp_word_length = DAVINCI_MCBSP_WORD_32;
- break;
- default:
- printk(KERN_WARNING "davinci-i2s: unsupported PCM format\n");
- return -EINVAL;
- }
-
- if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_RCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_RCR_RWDLEN1(mcbsp_word_length) |
- DAVINCI_MCBSP_RCR_RWDLEN2(mcbsp_word_length), 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG, w);
-
+ if (channels == 2) {
+ /* Combining both channels into 1 element will x10 the
+ * amount of time between servicing the dma channel, increase
+ * effiency, and reduce the chance of overrun/underrun. But,
+ * it will result in the left & right channels being swapped.
+ * So, let the codec know to swap them back.
+ *
+ * It is x10 instead of x2 because the clock from the codec
+ * runs at mclk speed, independent of the sample rate.
+ * So, having an entire frame at once means it has to be
+ * serviced at the sample rate instead of the mclk speed.
+ *
+ * In the now very unlikely case that an underrun still
+ * occurs, both the left and right samples will be repeated
+ * so that no pops are heard, and the left and right channels
+ * won't end up being swapped because of the underrun.
+ */
+ right_first = 1;
+ dma_params->convert_mono_stereo = 0;
+ switch (format) {
+ case SNDRV_PCM_FORMAT_S8:
+ dma_params->data_type = 2; /* 2 byte frame */
+ mcbsp_word_length = DAVINCI_MCBSP_WORD_16;
+ break;
+ case SNDRV_PCM_FORMAT_S16_LE:
+ dma_params->data_type = 4; /* 4 byte frame */
+ mcbsp_word_length = DAVINCI_MCBSP_WORD_32;
+ break;
+ case SNDRV_PCM_FORMAT_S32_LE:
+ right_first = 0;
+ element_cnt = 2;
+ dma_params->data_type = 4; /* 4 byte element */
+ mcbsp_word_length = DAVINCI_MCBSP_WORD_32;
+ break;
+ default:
+ printk(KERN_WARNING
+ "davinci-i2s: unsupported PCM format");
+ return -EINVAL;
+ }
} else {
- w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_XCR_REG);
- MOD_REG_BIT(w, DAVINCI_MCBSP_XCR_XWDLEN1(mcbsp_word_length) |
- DAVINCI_MCBSP_XCR_XWDLEN2(mcbsp_word_length), 1);
- davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG, w);
-
+ dma_params->convert_mono_stereo = 1;
+ /* 1 element in ram becomes 2 for stereo */
+ element_cnt = 2;
+ switch (format) {
+ case SNDRV_PCM_FORMAT_S8:
+ /* 1 byte frame in ram */
+ dma_params->data_type = 1;
+ mcbsp_word_length = DAVINCI_MCBSP_WORD_8;
+ break;
+ case SNDRV_PCM_FORMAT_S16_LE:
+ /* 2 byte frame in ram */
+ dma_params->data_type = 2;
+ mcbsp_word_length = DAVINCI_MCBSP_WORD_16;
+ break;
+ case SNDRV_PCM_FORMAT_S32_LE:
+ /* 4 byte element */
+ dma_params->data_type = 4;
+ mcbsp_word_length = DAVINCI_MCBSP_WORD_32;
+ break;
+ default:
+ printk(KERN_WARNING
+ "davinci-i2s: unsupported PCM format");
+ return -EINVAL;
+ }
}
+ if (codec_dai->dai_ops.inform_channel_order)
+ codec_dai->dai_ops.inform_channel_order(codec_dai, right_first);
+ rcr |= DAVINCI_MCBSP_RCR_RFRLEN1(element_cnt - 1);
+ xcr |= DAVINCI_MCBSP_XCR_XFRLEN1(element_cnt - 1);
+
+ rcr |= DAVINCI_MCBSP_RCR_RWDLEN1(mcbsp_word_length) |
+ DAVINCI_MCBSP_RCR_RWDLEN2(mcbsp_word_length);
+ xcr |= DAVINCI_MCBSP_XCR_XWDLEN1(mcbsp_word_length) |
+ DAVINCI_MCBSP_XCR_XWDLEN2(mcbsp_word_length);
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG, xcr);
+ else
+ davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG, rcr);
return 0;
}
+static int davinci_i2s_prepare(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data;
+ int playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
+ davinci_mcbsp_stop(dev, playback);
+ if ((dev->pcr & DAVINCI_MCBSP_PCR_FSXM) == 0) {
+ /* codec is master */
+ davinci_mcbsp_start(dev, substream);
+ }
+ return 0;
+}
static int davinci_i2s_trigger(struct snd_pcm_substream *substream, int cmd)
{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data;
int ret = 0;
+ int playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
+ if ((dev->pcr & DAVINCI_MCBSP_PCR_FSXM) == 0)
+ return 0; /* return if codec is master */
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- davinci_mcbsp_start(substream);
+ davinci_mcbsp_start(dev, substream);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- davinci_mcbsp_stop(substream);
+ davinci_mcbsp_stop(dev, playback);
break;
default:
ret = -EINVAL;
}
-
return ret;
}
+static void davinci_i2s_shutdown(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data;
+ davinci_mcbsp_stop(dev, 1);
+}
+
static int davinci_i2s_probe(struct platform_device *pdev,
struct snd_soc_dai *dai)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_machine *machine = socdev->machine;
struct snd_soc_dai *cpu_dai = machine->dai_link[pdev->id].cpu_dai;
+ struct snd_soc_dai *codec_dai = machine->dai_link[pdev->id].codec_dai;
struct davinci_mcbsp_dev *dev;
struct resource *mem, *ioarea;
struct evm_snd_platform_data *pdata;
@@ -400,6 +520,7 @@ static int davinci_i2s_probe(struct platform_device *pdev,
ret = -ENOMEM;
goto err_release_region;
}
+ dev->codec_dai = codec_dai;
cpu_dai->private_data = dev;
@@ -451,8 +572,8 @@ static void davinci_i2s_remove(struct platform_device *pdev,
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
release_mem_region(mem->start, (mem->end - mem->start) + 1);
}
-
-#define DAVINCI_I2S_RATES SNDRV_PCM_RATE_8000_96000
+#define DAVINCI_I2S_RATES (SNDRV_PCM_RATE_8000_96000 |\
+ SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_CONTINUOUS)
struct snd_soc_dai davinci_i2s_dai = {
.name = "davinci-i2s",
@@ -461,17 +582,21 @@ struct snd_soc_dai davinci_i2s_dai = {
.probe = davinci_i2s_probe,
.remove = davinci_i2s_remove,
.playback = {
- .channels_min = 2,
+ /* fixme, codecs shouldn't need to lie */
+ .channels_min = 1, /* lie, I2S dma will convert to stereo*/
.channels_max = 2,
.rates = DAVINCI_I2S_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
.capture = {
- .channels_min = 2,
+ /* fixme, codecs shouldn't need to lie */
+ .channels_min = 1, /* lie, I2S dma will convert from stereo */
.channels_max = 2,
.rates = DAVINCI_I2S_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
.ops = {
.startup = davinci_i2s_startup,
+ .shutdown = davinci_i2s_shutdown,
+ .prepare = davinci_i2s_prepare,
.trigger = davinci_i2s_trigger,
.hw_params = davinci_i2s_hw_params,},
.dai_ops = {
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index fdfdaa4..ce1f674 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -3,6 +3,7 @@
*
* Author: Vladimir Barinov, <[EMAIL PROTECTED]>
* Copyright: (C) 2007 MontaVista Software, Inc., <[EMAIL PROTECTED]>
+ * added IRAM ping/pong (C) 2008 Troy Kisky <[EMAIL PROTECTED]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -14,6 +15,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/dma-mapping.h>
+#include <mach/edma.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -27,11 +29,12 @@
#define DAVINCI_PCM_DEBUG 0
#if DAVINCI_PCM_DEBUG
-#define DPRINTK(x...) printk(KERN_DEBUG x)
+#define DPRINTK(format, arg...) printk(KERN_DEBUG format, ## arg)
#else
-#define DPRINTK(x...)
+#define DPRINTK(format, arg...) do {} while (0)
#endif
+
static struct snd_pcm_hardware davinci_pcm_hardware = {
.info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
@@ -48,7 +51,7 @@ static struct snd_pcm_hardware davinci_pcm_hardware = {
.channels_max = 2,
.buffer_bytes_max = 128 * 1024,
.period_bytes_min = 32,
- .period_bytes_max = 8 * 1024,
+ .period_bytes_max = 7 * 512, /* This is size of ping + pong buffer*/
.periods_min = 16,
.periods_max = 255,
.fifo_size = 0,
@@ -56,111 +59,297 @@ static struct snd_pcm_hardware davinci_pcm_hardware = {
struct davinci_runtime_data {
spinlock_t lock;
- int period; /* current DMA period */
- int master_lch; /* Master DMA channel */
- int slave_lch; /* Slave DMA channel */
- struct davinci_pcm_dma_params *params; /* DMA params */
+ int asp_master_lch; /* Master DMA channel */
+ int asp_link_lch[2]; /* asp parameter link channel */
+ int ram_master_lch;
+ int ram_link_lch;
+ /* Used if playback
+ * After initial copy of 1st iram buffer
+ * this is the link to finish the main buffer
+ */
+ int ram_link_lch2;
+ edmacc_paramentry_regs asp_params;
+ edmacc_paramentry_regs ram_params;
};
-static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
+#if DAVINCI_PCM_DEBUG
+void print_buf_info(int lch, char *name)
{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
- struct snd_pcm_runtime *runtime = substream->runtime;
- int lch = prtd->slave_lch;
- unsigned int period_size;
- unsigned int dma_offset;
- dma_addr_t dma_pos;
- dma_addr_t src, dst;
- unsigned short src_bidx, dst_bidx;
- unsigned int data_type;
- unsigned int count;
-
- period_size = snd_pcm_lib_period_bytes(substream);
- dma_offset = prtd->period * period_size;
- dma_pos = runtime->dma_addr + dma_offset;
-
- DPRINTK("audio_set_dma_params_play channel = %d dma_ptr = %x "
- "period_size=%x\n", lch, dma_pos, period_size);
-
- data_type = prtd->params->data_type;
- count = period_size / data_type;
-
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- src = dma_pos;
- dst = prtd->params->dma_addr;
- src_bidx = data_type;
- dst_bidx = 0;
- } else {
- src = prtd->params->dma_addr;
- dst = dma_pos;
- src_bidx = 0;
- dst_bidx = data_type;
- }
-
- davinci_set_dma_src_params(lch, src, INCR, W8BIT);
- davinci_set_dma_dest_params(lch, dst, INCR, W8BIT);
- davinci_set_dma_src_index(lch, src_bidx, 0);
- davinci_set_dma_dest_index(lch, dst_bidx, 0);
- davinci_set_dma_transfer_params(lch, data_type, count, 1, 0, ASYNC);
-
- prtd->period++;
- if (unlikely(prtd->period >= runtime->periods))
- prtd->period = 0;
+ edmacc_paramentry_regs p;
+ if (lch < 0)
+ return;
+ davinci_get_dma_params(lch, &p);
+ printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
+ name, lch, p.opt, p.src, p.a_b_cnt, p.dst);
+ printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x
ccnt=%x\n",
+ p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
}
+#endif
static void davinci_pcm_dma_irq(int lch, u16 ch_status, void *data)
{
struct snd_pcm_substream *substream = data;
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
+#if DAVINCI_PCM_DEBUG
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct davinci_runtime_data *prtd = runtime->private_data;
+ print_buf_info(prtd->ram_master_lch, "i ram_master_lch");
+#endif
DPRINTK("lch=%d, status=0x%x\n", lch, ch_status);
-
if (unlikely(ch_status != DMA_COMPLETE))
return;
if (snd_pcm_running(substream)) {
snd_pcm_period_elapsed(substream);
+ }
+}
- spin_lock(&prtd->lock);
- davinci_pcm_enqueue_dma(substream);
- spin_unlock(&prtd->lock);
+
+/*
+ * This is called after runtime->dma_addr, period_bytes and data_type are valid
+ */
+static int davinci_pcm_dma_setup(struct snd_pcm_substream *substream)
+{
+ unsigned short ram_src_cidx, ram_dst_cidx;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct davinci_runtime_data *prtd = runtime->private_data;
+ struct snd_dma_buffer *iram_dma =
+ (struct snd_dma_buffer *)substream->dma_buffer.private_data;
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct davinci_pcm_dma_params *dma_data = rtd->dai->cpu_dai->dma_data;
+ unsigned int data_type = dma_data->data_type;
+ unsigned int convert_mono_stereo = dma_data->convert_mono_stereo;
+ /* divide by 2 for ping/pong */
+ unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
+ int lch = prtd->asp_link_lch[1];
+ if ((data_type == 0) || (data_type > 4)) {
+ printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
+ return -EINVAL;
+ }
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
+ ram_src_cidx = ping_size;
+ ram_dst_cidx = -ping_size;
+ davinci_set_dma_src_params(lch, asp_src_pong, INCR, 0);
+
+ lch = prtd->asp_link_lch[0];
+ if (convert_mono_stereo) {
+ davinci_set_dma_src_index(lch, 0, data_type);
+ lch = prtd->asp_link_lch[1];
+ davinci_set_dma_src_index(lch, 0, data_type);
+ } else {
+ davinci_set_dma_src_index(lch, data_type, 0);
+ lch = prtd->asp_link_lch[1];
+ davinci_set_dma_src_index(lch, data_type, 0);
+ }
+
+ lch = prtd->ram_link_lch;
+ davinci_set_dma_src_params(lch, runtime->dma_addr,
+ INCR, W32BIT);
+ } else {
+ dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
+ ram_src_cidx = -ping_size;
+ ram_dst_cidx = ping_size;
+ davinci_set_dma_dest_params(lch, asp_dst_pong, INCR, 0);
+
+ lch = prtd->asp_link_lch[0];
+ if (convert_mono_stereo) {
+ davinci_set_dma_dest_index(lch, 0, data_type);
+ lch = prtd->asp_link_lch[1];
+ davinci_set_dma_dest_index(lch, 0, data_type);
+ } else {
+ davinci_set_dma_dest_index(lch, data_type, 0);
+ lch = prtd->asp_link_lch[1];
+ davinci_set_dma_dest_index(lch, data_type, 0);
+ }
+ lch = prtd->ram_link_lch;
+ davinci_set_dma_dest_params(lch, runtime->dma_addr,
+ INCR, W32BIT);
+ }
+
+ lch = prtd->asp_link_lch[0];
+ if (convert_mono_stereo) {
+ davinci_set_dma_transfer_params(lch, data_type,
+ 2, ping_size/data_type, 2, ASYNC);
+ lch = prtd->asp_link_lch[1];
+ davinci_set_dma_transfer_params(lch, data_type,
+ 2, ping_size/data_type, 2, ASYNC);
+ } else {
+ davinci_set_dma_transfer_params(lch, data_type,
+ ping_size/data_type, 1, 0, ASYNC);
+ lch = prtd->asp_link_lch[1];
+ davinci_set_dma_transfer_params(lch, data_type,
+ ping_size/data_type, 1, 0, ASYNC);
+ }
+
+
+ lch = prtd->ram_link_lch;
+ davinci_set_dma_src_index(lch, ping_size, ram_src_cidx);
+ davinci_set_dma_dest_index(lch, ping_size, ram_dst_cidx);
+ davinci_set_dma_transfer_params(lch, ping_size, 2,
+ runtime->periods, 2, ASYNC);
+
+ /* init master params */
+ davinci_get_dma_params(prtd->asp_link_lch[0], &prtd->asp_params);
+ davinci_get_dma_params(prtd->ram_link_lch, &prtd->ram_params);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ edmacc_paramentry_regs parm;
+ /* Copy entire iram buffer before playback started */
+ prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
+ /* 0 dst_bidx */
+ prtd->ram_params.src_dst_bidx = (ping_size << 1);
+ /* 0 dst_cidx */
+ prtd->ram_params.src_dst_cidx = (ping_size << 1);
+ prtd->ram_params.ccnt = 1;
+
+ /* Skip 1st period */
+ davinci_get_dma_params(prtd->ram_link_lch, &parm);
+ parm.src += (ping_size << 1);
+ parm.ccnt -= 1;
+ davinci_set_dma_params(prtd->ram_link_lch2, &parm);
}
+ return 0;
}
+/* 1 asp tx or rx channel using 2 parameter channels
+ * 1 ram to/from iram channel using 1 parameter channel
+ *
+ * Playback
+ * ram copy channel kicks off first,
+ * 1st ram copy of entire iram buffer completion kicks off asp channel
+ * asp tcc always kicks off ram copy of 1/2 iram buffer
+ *
+ * Record
+ * asp channel starts, tcc kicks off ram copy
+ */
static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
{
- struct davinci_runtime_data *prtd = substream->runtime->private_data;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_dma_buffer *iram_dma =
+ (struct snd_dma_buffer *)substream->dma_buffer.private_data;
+ struct davinci_runtime_data *prtd = runtime->private_data;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct davinci_pcm_dma_params *dma_data = rtd->dai->cpu_dai->dma_data;
+
+ dma_addr_t asp_src_ping;
+ dma_addr_t asp_dst_ping;
+
int tcc = TCC_ANY;
int ret;
+ int lch;
+ edmacc_paramentry_regs parm;
- if (!dma_data)
+ if ((!dma_data) || (!iram_dma))
return -ENODEV;
- prtd->params = dma_data;
+ /* Request ram master channel */
+ ret = davinci_request_dma(DAVINCI_DMA_CHANNEL_ANY, "audio iram",
+ davinci_pcm_dma_irq, substream,
+ &prtd->ram_master_lch, &tcc, EVENTQ_1);
+ if (ret)
+ goto exit1;
+
+ /* Request ram link channel */
+ tcc = TCC_ANY;
+ ret = davinci_request_dma(DAVINCI_EDMA_PARAM_ANY, "audio iram link",
+ NULL, NULL,
+ &prtd->ram_link_lch, &tcc, EVENTQ_1);
+ if (ret)
+ goto exit2;
- /* Request master DMA channel */
- ret = davinci_request_dma(prtd->params->channel, prtd->params->name,
+ /* Request asp master DMA channel */
+ tcc = prtd->ram_master_lch;
+ ret = davinci_request_dma(dma_data->channel, dma_data->name,
davinci_pcm_dma_irq, substream,
- &prtd->master_lch, &tcc, EVENTQ_0);
+ &prtd->asp_master_lch, &tcc, EVENTQ_0);
if (ret)
- return ret;
+ goto exit3;
+ /* Request asp link channels */
+ tcc = prtd->ram_master_lch;
+ ret = davinci_request_dma(DAVINCI_EDMA_PARAM_ANY, "audio asp ping",
+ NULL, NULL,
+ &prtd->asp_link_lch[0], &tcc, EVENTQ_0);
+ if (ret)
+ goto exit4;
+ tcc = prtd->ram_master_lch;
+ ret = davinci_request_dma(DAVINCI_EDMA_PARAM_ANY, "audio asp pong",
+ NULL, NULL,
+ &prtd->asp_link_lch[1], &tcc, EVENTQ_0);
+ if (ret)
+ goto exit5;
- /* Request slave DMA channel */
- ret = davinci_request_dma(DAVINCI_EDMA_PARAM_ANY, "Link",
- NULL, NULL, &prtd->slave_lch, &tcc, EVENTQ_0);
- if (ret) {
- davinci_free_dma(prtd->master_lch);
- return ret;
+ prtd->ram_link_lch2 = -1;
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ tcc = TCC_ANY;
+ ret = davinci_request_dma(DAVINCI_EDMA_PARAM_ANY,
+ "audio iram playback link", NULL, NULL,
+ &prtd->ram_link_lch2, &tcc, EVENTQ_1);
+ if (ret)
+ goto exit6;
}
- /* Link slave DMA channel in loopback */
- davinci_dma_link_lch(prtd->slave_lch, prtd->slave_lch);
+ /* circle ping-pong buffers */
+ davinci_dma_link_lch(prtd->asp_link_lch[0], prtd->asp_link_lch[1]);
+ davinci_dma_link_lch(prtd->asp_link_lch[1], prtd->asp_link_lch[0]);
+ /* circle ram buffers */
+ davinci_dma_link_lch(prtd->ram_link_lch, prtd->ram_link_lch);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ asp_src_ping = iram_dma->addr;
+ asp_dst_ping = dma_data->dma_addr; /* fifo */
+ } else {
+ asp_src_ping = dma_data->dma_addr; /* fifo */
+ asp_dst_ping = iram_dma->addr;
+ }
+ /* ping */
+ lch = prtd->asp_link_lch[0];
+ davinci_set_dma_src_params(lch, asp_src_ping, INCR, W16BIT);
+ davinci_set_dma_dest_params(lch, asp_dst_ping, INCR, W16BIT);
+ davinci_set_dma_src_index(lch, 0, 0);
+ davinci_set_dma_dest_index(lch, 0, 0);
+
+ davinci_get_dma_params(lch, &parm);
+ parm.opt &= ~(TCCMODE | TCC | TCINTEN);
+ parm.opt |= TCCHEN | ((prtd->ram_master_lch & 0x3f)<<12);
+ davinci_set_dma_params(lch, &parm);
+
+ /* pong */
+ lch = prtd->asp_link_lch[1];
+ davinci_set_dma_src_params(lch, asp_src_ping, INCR, W16BIT);
+ davinci_set_dma_dest_params(lch, asp_dst_ping, INCR, W16BIT);
+ davinci_set_dma_src_index(lch, 0, 0);
+ davinci_set_dma_dest_index(lch, 0, 0);
+
+ davinci_get_dma_params(lch, &parm);
+ parm.opt &= ~(TCCMODE | TCC);
+ /* interrupt after every pong completion */
+ parm.opt |= TCINTEN | TCCHEN | ((prtd->ram_master_lch & 0x3f)<<12);
+ davinci_set_dma_params(lch, &parm);
+
+ /* ram */
+ lch = prtd->ram_link_lch;
+ davinci_set_dma_src_params(lch, iram_dma->addr, INCR, W32BIT);
+ davinci_set_dma_dest_params(lch, iram_dma->addr, INCR, W32BIT);
return 0;
+exit6:
+ davinci_free_dma(prtd->ram_link_lch2);
+exit5:
+ davinci_free_dma(prtd->asp_link_lch[0]);
+exit4:
+ davinci_free_dma(prtd->asp_master_lch);
+exit3:
+ davinci_free_dma(prtd->ram_link_lch);
+exit2:
+ davinci_free_dma(prtd->ram_master_lch);
+exit1:
+ return ret;
}
-
+/* I2S master (codec/cpudai) should start/stop dma request,
+ * we shouldn't ignore them
+ * codec AIC33 needs fixed
+ */
+#define BROKEN_MASTER 1
+#ifdef BROKEN_MASTER
static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct davinci_runtime_data *prtd = substream->runtime->private_data;
@@ -172,12 +361,12 @@ static int davinci_pcm_trigger(struct snd_pcm_substream
*substream, int cmd)
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- davinci_start_dma(prtd->master_lch);
+ davinci_resume_dma(prtd->asp_master_lch);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- davinci_stop_dma(prtd->master_lch);
+ davinci_pause_dma(prtd->asp_master_lch);
break;
default:
ret = -EINVAL;
@@ -188,19 +377,34 @@ static int davinci_pcm_trigger(struct snd_pcm_substream
*substream, int cmd)
return ret;
}
+#endif
static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
{
+ int ret;
struct davinci_runtime_data *prtd = substream->runtime->private_data;
- edmacc_paramentry_regs temp;
-
- prtd->period = 0;
- davinci_pcm_enqueue_dma(substream);
-
- /* Get slave channel dma params for master channel startup */
- davinci_get_dma_params(prtd->slave_lch, &temp);
- davinci_set_dma_params(prtd->master_lch, &temp);
+ ret = davinci_pcm_dma_setup(substream);
+ if (ret < 0)
+ return ret;
+ davinci_set_dma_params(prtd->ram_master_lch, &prtd->ram_params);
+ davinci_dma_link_lch(prtd->ram_master_lch, prtd->ram_link_lch2);
+ davinci_set_dma_params(prtd->asp_master_lch, &prtd->asp_params);
+#if DAVINCI_PCM_DEBUG
+ if (1) {
+ print_buf_info(prtd->ram_master_lch, "ram_master_lch");
+ print_buf_info(prtd->ram_link_lch, "ram_link_lch");
+ print_buf_info(prtd->ram_link_lch2, "ram_link_lch2");
+ print_buf_info(prtd->asp_master_lch, "asp_master_lch");
+ print_buf_info(prtd->asp_link_lch[0], "asp_link_lch[0]");
+ print_buf_info(prtd->asp_link_lch[1], "asp_link_lch[1]");
+ }
+#endif
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ /* copy 1st iram buffer */
+ davinci_start_dma(prtd->ram_master_lch);
+ }
+ davinci_start_dma(prtd->asp_master_lch);
return 0;
}
@@ -210,20 +414,44 @@ davinci_pcm_pointer(struct snd_pcm_substream *substream)
struct snd_pcm_runtime *runtime = substream->runtime;
struct davinci_runtime_data *prtd = runtime->private_data;
unsigned int offset;
- dma_addr_t count;
- dma_addr_t src, dst;
+ int count_asp, count_ram;
+ int mod_ram;
+ dma_addr_t ram_src, ram_dst;
+ dma_addr_t asp_src, asp_dst;
+ unsigned int period_size = snd_pcm_lib_period_bytes(substream);
spin_lock(&prtd->lock);
-
- davinci_dma_getposition(prtd->master_lch, &src, &dst);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- count = src - runtime->dma_addr;
- else
- count = dst - runtime->dma_addr;;
-
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ /* reading ram before asp should be safe
+ * as long as the asp transfers less than a ping size
+ * of bytes between the 2 reads
+ */
+ davinci_dma_getposition(prtd->ram_master_lch,
+ &ram_src, &ram_dst);
+ davinci_dma_getposition(prtd->asp_master_lch,
+ &asp_src, &asp_dst);
+ count_asp = asp_src - prtd->asp_params.src;
+ count_ram = ram_src - prtd->ram_params.src;
+ mod_ram = count_ram % period_size;
+ mod_ram -= count_asp;
+ if (mod_ram < 0)
+ mod_ram += period_size;
+ else if (mod_ram == 0) {
+ if (snd_pcm_running(substream))
+ mod_ram += period_size;
+ }
+ count_ram -= mod_ram;
+ if (count_ram < 0)
+ count_ram += period_size * runtime->periods;
+ } else {
+ davinci_dma_getposition(prtd->ram_master_lch,
+ &ram_src, &ram_dst);
+ count_ram = ram_dst - prtd->ram_params.dst;
+ }
spin_unlock(&prtd->lock);
- offset = bytes_to_frames(runtime, count);
+ offset = bytes_to_frames(runtime, count_ram);
+ DPRINTK("offset=0x%x\n", offset);
if (offset >= runtime->buffer_size)
offset = 0;
@@ -260,13 +488,22 @@ static int davinci_pcm_close(struct snd_pcm_substream
*substream)
struct snd_pcm_runtime *runtime = substream->runtime;
struct davinci_runtime_data *prtd = runtime->private_data;
- davinci_dma_unlink_lch(prtd->slave_lch, prtd->slave_lch);
-
- davinci_free_dma(prtd->slave_lch);
- davinci_free_dma(prtd->master_lch);
-
+ davinci_stop_dma(prtd->ram_master_lch);
+ davinci_stop_dma(prtd->asp_master_lch);
+ davinci_dma_unlink_lch(prtd->asp_link_lch[0], prtd->asp_link_lch[0]);
+ davinci_dma_unlink_lch(prtd->asp_link_lch[1], prtd->asp_link_lch[1]);
+ davinci_dma_unlink_lch(prtd->ram_link_lch, prtd->ram_link_lch);
+
+ davinci_free_dma(prtd->asp_link_lch[0]);
+ davinci_free_dma(prtd->asp_link_lch[1]);
+ davinci_free_dma(prtd->asp_master_lch);
+ davinci_free_dma(prtd->ram_link_lch);
+ if (prtd->ram_link_lch2 != -1) {
+ davinci_free_dma(prtd->ram_link_lch2);
+ prtd->ram_link_lch2 = -1;
+ }
+ davinci_free_dma(prtd->ram_master_lch);
kfree(prtd);
-
return 0;
}
@@ -300,7 +537,9 @@ struct snd_pcm_ops davinci_pcm_ops = {
.hw_params = davinci_pcm_hw_params,
.hw_free = davinci_pcm_hw_free,
.prepare = davinci_pcm_prepare,
- .trigger = davinci_pcm_trigger,
+#ifdef BROKEN_MASTER
+ .trigger = davinci_pcm_trigger,
+#endif
.pointer = davinci_pcm_pointer,
.mmap = davinci_pcm_mmap,
};
@@ -310,21 +549,42 @@ static int davinci_pcm_preallocate_dma_buffer(struct
snd_pcm *pcm, int stream)
struct snd_pcm_substream *substream = pcm->streams[stream].substream;
struct snd_dma_buffer *buf = &substream->dma_buffer;
size_t size = davinci_pcm_hardware.buffer_bytes_max;
+ struct snd_dma_buffer *iram_dma = NULL;
+ unsigned iram_phys = 0;
+ unsigned int iram_size = davinci_pcm_hardware.period_bytes_max;
buf->dev.type = SNDRV_DMA_TYPE_DEV;
buf->dev.dev = pcm->card->dev;
buf->private_data = NULL;
+ buf->bytes = size;
buf->area = dma_alloc_writecombine(pcm->card->dev, size,
&buf->addr, GFP_KERNEL);
DPRINTK("preallocate_dma_buffer: area=%p, addr=%p, size=%d\n",
(void *) buf->area, (void *) buf->addr, size);
- if (!buf->area)
- return -ENOMEM;
- buf->bytes = size;
+ if (!buf->area)
+ goto exit1;
+ iram_phys = davinci_alloc_iram(iram_size);
+ if (((int)iram_phys) <= 0)
+ goto exit2;
+ iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
+ if (!iram_dma)
+ goto exit3;
+ iram_dma->area = (char *)ioremap(iram_phys, iram_size);
+ iram_dma->addr = iram_phys;
+ memset(iram_dma->area, 0, iram_size);
+ buf->private_data = iram_dma ;
return 0;
+ kfree(iram_dma);
+exit3:
+ davinci_free_iram(iram_phys, iram_size);
+exit2:
+ dma_free_writecombine(pcm->card->dev, size, buf->area, buf->addr);
+ buf->area = NULL;
+exit1:
+ return -ENOMEM;
}
static void davinci_pcm_free(struct snd_pcm *pcm)
@@ -334,6 +594,8 @@ static void davinci_pcm_free(struct snd_pcm *pcm)
int stream;
for (stream = 0; stream < 2; stream++) {
+ unsigned int iram_size = davinci_pcm_hardware.period_bytes_max;
+ struct snd_dma_buffer *iram_dma;
substream = pcm->streams[stream].substream;
if (!substream)
continue;
@@ -345,6 +607,11 @@ static void davinci_pcm_free(struct snd_pcm *pcm)
dma_free_writecombine(pcm->card->dev, buf->bytes,
buf->area, buf->addr);
buf->area = NULL;
+ iram_dma = (struct snd_dma_buffer *)buf->private_data;
+ if (iram_dma) {
+ davinci_free_iram(iram_dma->addr, iram_size);
+ kfree(iram_dma);
+ }
}
}
@@ -362,18 +629,17 @@ static int davinci_pcm_new(struct snd_card *card,
if (dai->playback.channels_min) {
ret = davinci_pcm_preallocate_dma_buffer(pcm,
- SNDRV_PCM_STREAM_PLAYBACK);
+ SNDRV_PCM_STREAM_PLAYBACK);
if (ret)
return ret;
}
if (dai->capture.channels_min) {
ret = davinci_pcm_preallocate_dma_buffer(pcm,
- SNDRV_PCM_STREAM_CAPTURE);
+ SNDRV_PCM_STREAM_CAPTURE);
if (ret)
return ret;
}
-
return 0;
}
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index 62cb4eb..fc70161 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -16,7 +16,8 @@ struct davinci_pcm_dma_params {
char *name; /* stream identifier */
int channel; /* sync dma channel ID */
dma_addr_t dma_addr; /* device physical address for DMA */
- unsigned int data_type; /* xfer data type */
+ unsigned char data_type; /* xfer data type */
+ unsigned char convert_mono_stereo;
};
struct evm_snd_platform_data {
--
1.5.4.3
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