I forgot to mention that when I load DSP executable I get the following message:


Error: DSP-side memory map does not match configuration.

Compare DSP-side TCF/MAP file with /dsplink/config/all/CFG_<PLATFORM>.c

--- On Thu, 12/18/08, Omkiran Sharma <[email protected]> wrote:
From: Omkiran Sharma <[email protected]>
Subject: Re: Changing the default memory map on DM6446
To: [email protected]
Cc: [email protected]
Date: Thursday, December 18, 2008, 12:05 AM

Benjamin,
  The MAR bits are simply to allow caching of the DDR region. Each bit stands 
for 16MBytes of external memory. 1 would indicate that region should be cached 
in L2 and 0 would disable caching.  The 128to159 indicates this is for the 
128th to 159th 16MB chunk in external memory which started from 0x80000000. 
Hence set it according to which region of DDR you wanted cached by the DSP. 
Generally this is the region where codec data memory resides [DDRALGHEAP].  

Regards,
Omkiran


2008/12/18 Benjamin Suljic <[email protected]>





Hi all,

I am working on a custom DaVinci DM6446 board. I have been trying to change the 
default memory map to allocate more memory for DDR2 on the DSP side but without 
any luck. My application is running without codec engine. 


My default DSPLink configuration is: STATIC CONST LINKCFG_MemEntry  
LINKCFG_memTable_00 [] =
{
    {
        0,                     /* ENTRY          : Entry number */
        "DSPLINKMEM",          /* NAME           : Name of the memory region */

        0x8FE00000,            /* ADDRPHYS       : Physical address */
        0x8FE00000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */

        0x5000,                /* SIZE           : Size of the memory region */
        TRUE                   /* SHARED         : Shared access memory? */
    },
    {
        1,                     /* ENTRY          : Entry number */

        "DSPLINKMEM1",         /* NAME           : Name of the memory region */
        0x8FE05000,            /* ADDRPHYS       : Physical address */
        0x8FE05000,            /* ADDRDSPVIRT    : DSP virtual address */

        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0xFB000,               /* SIZE           : Size of the memory region */
        TRUE                   /* SHARED         : Shared access memory? */

    },
    {
        2,                     /* ENTRY          : Entry number */
        "RESETCTRL",           /* NAME           : Name of the memory region */
        0x8FF00000,            /* ADDRPHYS       : Physical address */

        0x8FF00000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0x00000080,            /* SIZE           : Size of the memory region */

        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        3,                     /* ENTRY          : Entry number */
        "DDR2",                /* NAME           : Name of the memory region */

        0x8FF00080,            /* ADDRPHYS       : Physical address */
        0x8FF00080,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */

        0xFFF80,               /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        4,                     /* ENTRY          : Entry number */

        "DSPIRAM",             /* NAME           : Name of the memory region */
        0x11800000,            /* ADDRPHYS       : Physical address */
        0x11800000,            /* ADDRDSPVIRT    : DSP virtual address */

        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0x10000,               /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */

    },
    {
        5,                     /* ENTRY          : Entry number */
        "DSPL1DRAM",           /* NAME           : Name of the memory region */
        0x11F04000,            /* ADDRPHYS       : Physical address */

        0x11F04000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0xC000,                /* SIZE           : Size of the memory region */

        FALSE                  /* SHARED         : Shared access memory? */
    }
} ;

I have followed the following tutorial on davinci wiki to change the memory 
map. 
http://tiexpressdsp.com/wiki/index.php?title=Changing_DSPLink_Memory_Map


My new configuration is: 
{
    {
        0,                     /* ENTRY          : Entry number */
        "DSPLINKMEM",          /* NAME           : Name of the memory region */
        0x8FB00000,            /* ADDRPHYS       : Physical address */

        0x8FB00000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0x5000,                /* SIZE           : Size of the memory region */

        TRUE                   /* SHARED         : Shared access memory? */
    },
    {
        1,                     /* ENTRY          : Entry number */
        "DSPLINKMEM1",         /* NAME           : Name of the memory region */

        0x8FB05000,            /* ADDRPHYS       : Physical address */
        0x8FB05000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */

        0xFB000,               /* SIZE           : Size of the memory region */
        TRUE                   /* SHARED         : Shared access memory? */
    },
    {
        2,                     /* ENTRY          : Entry number */

        "RESETCTRL",           /* NAME           : Name of the memory region */
        0x8FC00000,            /* ADDRPHYS       : Physical address */
        0x8FC00000,            /* ADDRDSPVIRT    : DSP virtual address */

        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0x00000080,            /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */

    },
    {
        3,                     /* ENTRY          : Entry number */
        "DDR2",                /* NAME           : Name of the memory region */
        0x8FC00080,            /* ADDRPHYS       : Physical address */

        0x8FC00080,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0x3FFF80,               /* SIZE           : Size of the memory region */

        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        4,                     /* ENTRY          : Entry number */
        "DSPIRAM",             /* NAME           : Name of the memory region */

        0x11800000,            /* ADDRPHYS       : Physical address */
        0x11800000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */

        0x10000,               /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        5,                     /* ENTRY          : Entry number */

        "DSPL1DRAM",           /* NAME           : Name of the memory region */
        0x11F04000,            /* ADDRPHYS       : Physical address */
        0x11F04000,            /* ADDRDSPVIRT    : DSP virtual address */

        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if 
known) */
        0xC000,                /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */

    }
} ;

I have changed DDR2 size from 1 to 4 MB and moved everything up for 3MB so I 
can re size the DDR2.  I have not changed the amount of memory that Linux is 
allocation (mem=114MB). 

Old configuration:

DSPLINKMEM:
start from 254MB
size          1MB
DDR2:
start from 255MB
size          1MB

New Configuration:
DSPLINKMEM
start from 251MB
size          1MB
DDR2
start from 252MB
size          4MB


I have made the same changes on the DSP side. What i don't know is do I need to 
change 
prog.module("GBL").C64PLUSMAR128to159 = 0x0000FFF0 ;


and to which value?

Any suggerstion?


Tnx,
Benjamin







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