Vijay, I'm not sure if you can use NAND flashes with different page sizes at the same time. I'm not an expert on that area so I just don't know. Perhaps someone else here does.
As for the spare bytes region I'm guessing that you will need to do change the driver code to handle a different layout if you want to read factory bad blocks. If not then you should be able to use the default layout and let the nand driver write the bad block table for you. I would consult the NAND chip data sheet to see what it requires for the OOB data. Sincerely, Chase Maupin Software Applications Catalog DSP Products e-mail: [email protected] phone: (281) 274-3285 > -----Original Message----- > From: Vijay Soni [mailto:[email protected]] > Sent: Wednesday, December 17, 2008 2:47 PM > To: Maupin, Chase > Cc: [email protected] > Subject: 4 k page NF > > Chase, > > > Our is Micron 4k page NF with 218 bytes spare area(not 128). We want to > use it in parallel to the existing Micron 2 k NF (with 62 bytes in spare > area) . EM_A13and EM_A12 are used together with CE0 for chip select. There > are four chip select (two on each NF). The larger NF may have just one > partition. Besides the changes that you mention, we will have to do > changes for chip select logic, and what about oob structure for 218 bytes > spare. > > Vijay > > > _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
