From: David Brownell <[email protected]> Minor cleanups of the DaVinci DMA code: spelling/grammar, and marking const data arrays as such. Shrink some data.
Substantive change: learn that the dm355 and dm644x chips have different sets of valid DMA event channels. MMC1 DMA now works on dm355 ... it uses channels that dm6446 can't. Signed-off-by: David Brownell <[email protected]> --- arch/arm/mach-davinci/dma.c | 70 ++++++++++++++++++++++++------------------ 1 file changed, 41 insertions(+), 29 deletions(-) --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c @@ -29,6 +29,7 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/spinlock.h> +#include <linux/compiler.h> #include <linux/io.h> #include <mach/cpu.h> @@ -259,27 +260,27 @@ static struct dma_interrupt_data { } intr_data[64]; /* - Each bit field of the elements bellow indicate the corresponding EDMA channel + Each bit field of the elements below indicates corresponding EDMA channel availability on arm side events */ -static unsigned long edma_channels_arm[] = { +static const unsigned long edma_channels_arm[] = { 0xffffffff, 0xffffffff }; /* - Each bit field of the elements bellow indicate the corresponding QDMA channel + Each bit field of the elements below indicates corresponding QDMA channel availability on arm side events */ -static unsigned char qdma_channels_arm[] = { +static const unsigned char qdma_channels_arm[] = { 0x00 }; /* - Each bit field of the elements bellow indicate corresponding PARAM entry - availibility on arm side events + Each bit field of the elements below indicates corresponding PARAM entry + availability on arm side events */ -static unsigned long param_entry_arm[] = { +static const unsigned long param_entry_arm[] = { 0xffffffff, 0xffffffff, 0x0000ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, @@ -287,7 +288,7 @@ static unsigned long param_entry_arm[] = }; /* - Each bit field of the elements bellow indicate whether a PARAM entry + Each bit field of the elements below indicates whether a PARAM entry is free or in use 1 - free 0 - in use @@ -300,7 +301,7 @@ static unsigned long param_entry_use_sta }; /* - Each bit field of the elements bellow indicate whether a intrerrupt + Each bit field of the elements below indicates whether an interrupt is free or in use 1 - free 0 - in use @@ -310,23 +311,23 @@ static unsigned long dma_intr_use_status 0xffffffff }; -/* - This lists the DMA channel numbers which does not have any events - associated with it -*/ -static int dma_chan_no_event[] = { +/* These are the DMA channels with no associated events. */ +static const s8 dma_chan_dm644x_no_event[] = { 0, 1, 12, 13, 14, 15, 25, 30, 31, 45, 46, 47, 55, 56, 57, 58, 59, 60, 61, 62, 63, -1 }; +static const s8 dma_chan_dm355_no_event[] = { + 12, 13, 24, 56, 57, 58, 59, 60, 61, 62, 63, -1 +}; -static int queue_tc_mapping[DAVINCI_EDMA_NUM_EVQUE + 1][2] = { +static const int queue_tc_mapping[DAVINCI_EDMA_NUM_EVQUE + 1][2] = { /* {event queue no, TC no} */ {0, 0}, {1, 1}, {-1, -1} }; -static int queue_priority_mapping[DAVINCI_EDMA_NUM_EVQUE + 1][2] = { +static const int queue_priority_mapping[DAVINCI_EDMA_NUM_EVQUE + 1][2] = { /* {event queue no, Priority} */ {0, 3}, {1, 7}, @@ -335,6 +336,16 @@ static int queue_priority_mapping[DAVINC static int qdam_to_param_mapping[8] = { 0 }; +static short dma_chan_no_event(unsigned index) __pure; +static short dma_chan_no_event(unsigned index) +{ + if (cpu_is_davinci_dm644x()) + return dma_chan_dm644x_no_event[index]; + if (cpu_is_davinci_dm355()) + return dma_chan_dm355_no_event[index]; + WARN_ONCE(true, "what DMA channels are invalid?\n"); + return -1; +} /*****************************************************************************/ @@ -421,8 +432,8 @@ static int request_param(int lch, int de (param_entry_use_status[i / 32] & (1 << (i % 32)))) { if (dev_id != DAVINCI_EDMA_PARAM_ANY) { - while (dma_chan_no_event[j] != -1) { - if (dma_chan_no_event[j] == i) + while (dma_chan_no_event(j)!= -1) { + if (dma_chan_no_event(j) == i) is_break = 0; j++; } @@ -526,8 +537,8 @@ static int request_dma_interrupt(int lch (1 << (requested_tcc % 32))) { j = 0; is_break = 1; - while (dma_chan_no_event[j] != -1) { - if (dma_chan_no_event[j] == + while (dma_chan_no_event(j) != -1) { + if (dma_chan_no_event(j) == requested_tcc) { is_break = 0; break; @@ -562,8 +573,8 @@ static int request_dma_interrupt(int lch is_break = 1; if (dma_intr_use_status[i / 32] & (1 << (i % 32))) { - while (dma_chan_no_event[j] != -1) { - if (dma_chan_no_event[j] == i) { + while (dma_chan_no_event(j) != -1) { + if (dma_chan_no_event(j) == i) { is_break = 0; break; } @@ -1016,14 +1027,15 @@ int davinci_request_dma(int dev_id, cons } else if (dev_id == DAVINCI_DMA_CHANNEL_ANY) { i = 0; ret_val = 0; - while (dma_chan_no_event[i] != -1) { - if (!dma_chan[dma_chan_no_event[i]].in_use) { + while (dma_chan_no_event(i) != -1) { + if (!dma_chan[dma_chan_no_event(i)].in_use) { int j; - *lch = dma_chan_no_event[i]; - j = dma_chan[*lch].param_no = - request_param(*lch, dev_id); + + *lch = dma_chan_no_event(i); + j = request_param(*lch, dev_id); if (j == -1) return -EINVAL; + dma_chan[*lch].param_no = j; dev_dbg(&edma_dev.dev, "param_no=%d\r\n", j); if (DAVINCI_EDMA_IS_Q(j)) { edma_or_array(EDMA_QRAE, 0, 1 << (j - @@ -1381,8 +1393,8 @@ int davinci_start_dma(int lch) int j = lch >> 5; unsigned int mask = (1 << (lch & 0x1f)); /* If the dma start request is for the unused events */ - while (dma_chan_no_event[i] != -1) { - if (dma_chan_no_event[i] == lch) { + while (dma_chan_no_event(i) != -1) { + if (dma_chan_no_event(i) == lch) { /* EDMA channels without event association */ dev_dbg(&edma_dev.dev, "ESR%d=%x\r\n", j, edma_shadow0_read_array(SH_ESR, j)); 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