Hi Deepika,

I just hope you haven't been looking at this problem for 2 months,
since I have already answered your question then.

In fact what TI does with the pinmuxing layer in the kernel is very
bad practice, in my opinion.
Setting the pinmux layer and 3V3PWDN registers is not the kernel's
responsibility, it's the bootloader's.
That's also why we decided to disable the pinmux layer in the kernel
and use U-boot to set these registers.

You don't want an application to use the TSIF driver and suddenly
loose all UART communication.
Besides, the TSIF and UART can work fine together, it's just the
driver giving you problems.

As I said in my last e-mail look at davinci_serial_reset and draw your
conclusions. Add the
UART1/2 code there and the "too much work" issue will be gone. Disable
the pinmux layer
and set these registers through the bootloader, then you're free to do
what you want in the
kernel.

For those of you that are MontaVista customers, there are patches in
the pipeline to (more properly)
enable UART1/2 on their kernel.

Regards,
Stijn

On Mon, Dec 29, 2008 at 2:39 PM, Deepika Makhija
<deepika.makh...@einfochips.com> wrote:
> Hi All,
>
> Finally we got UART1 / UART2 working on DM6467  :)
> Step#1
>
> Make menuconfig and put no of uart to 3
> ( Device Drivers
>     ->Character Devices
>        ->Serial Drivers
>            ->Maximum number of non-legacy 8250/16550 serial ports
>              Set this to 3 )
>
>
> Step#2
> To enable UART2 and UART1
> Disable Consumer IR and TSIF module from Menuconfig
> ( Device Drivers
>  ->Character Devices
>     -> DM646x Consumer IR Driver  ( Remove it )
>     -> DM646x Transport Stream Interface Support ( Remove it )
>
> Step#3
> Add follow code snippest to your
> <ti-davinci-kernel>/arch/arm/mach-davinci/board-dm6467.c file
> ( Modify board_init function with the following code )
> static void board_init(void)
> {
> volatile int *ptr_pgmgt,*ptr_ier;
> int del          = 0;
>
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VLYNQ, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_HDVICP0, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_HDVICP1, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_SPI, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_TPCC, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_TPTC0, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_TPTC1, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_TPTC2, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_TPTC3, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_AEMIF, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_DM646X_LPSC_GPIO, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TIMER2, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_UART1, 1);
> board_setup_psc(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_UART2, 1);
>
> #define PINMUX0REG __REG(PINMUX0)
> #define PINMUX1REG __REG(PINMUX1)
> #define VDD3P3V_PWDN  __REG(0x01C40048)
> VDD3P3V_PWDN = 0;
> PINMUX0REG &= ~(0x1FFFF);
> PINMUX0REG  = 0x40000;
>
> PINMUX1REG = 0x15;
>
> ptr_ier          = (volatile int *)IO_ADDRESS(DAVINCI_UART1_BASE+0x4);
>
> *ptr_ier         = 0x0; //disable int
> ptr_pgmgt = (volatile int *) IO_ADDRESS(DAVINCI_UART1_BASE+0x20);
>  *ptr_pgmgt = 0x00;
>
> ptr_ier          = (volatile int *)IO_ADDRESS(DM644X_UART2_BASE+0x4);
> *ptr_ier         = 0x0; //disable int
> ptr_pgmgt = (volatile int *) IO_ADDRESS(DM644X_UART2_BASE+0x20);
>  *ptr_pgmgt = 0x00;
> davinci_serial_init(&serial_device);
> davinci_clk_init();
> }
>
> Step #4 Make uImage
>
> Have your UART1 / UART2 working without flow control  :)
> Thanks,
> Deepika
> --
> _____________________________________________________________________
> Disclaimer: This e-mail message and all attachments transmitted with it
> are intended solely for the use of the addressee and may contain legally
> privileged and confidential information. If the reader of this message
> is not the intended recipient, or an employee or agent responsible for
> delivering this message to the intended recipient, you are hereby
> notified that any dissemination, distribution, copying, or other use of
> this message or its attachments is strictly prohibited. If you have
> received this message in error, please notify the sender immediately by
> replying to this message and please delete it from your computer. Any
> views expressed in this message are those of the individual sender
> unless otherwise stated.Company has taken enough precautions to prevent
> the spread of viruses. However the company accepts no liability for any
> damage caused by any virus transmitted by this email.
> __________________________________________________________________________
>
>
> _______________________________________________
> Davinci-linux-open-source mailing list
> Davinci-linux-open-source@linux.davincidsp.com
> http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
>

_______________________________________________
Davinci-linux-open-source mailing list
Davinci-linux-open-source@linux.davincidsp.com
http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Reply via email to