Hi chaps, Can anyone point me at documentation describing the 4-bit ECC algorithm used in the DM355 NAND controller, or a source implementation?
I am trying to work out what's going on with my JTAG programmer, u-boot and Linux, and want to write a program I can run NAND dumps through to verify or generate ECC for them. Thanks, -- Jon Povey, Design Engineer [email protected] | +44(0)1280 825983 Racelogic is a limited company registered in England. Registered number 2743719 . Registered Office Unit 10, Swan Business Centre, Osier Way, Buckingham, Bucks, MK18 1TB . The information contained in this electronic mail transmission is intended by Racelogic Ltd for the use of the named individual or entity to which it is directed and may contain information that is confidential or privileged. If you have received this electronic mail transmission in error, please delete it from your system without copying or forwarding it, and notify the sender of the error by reply email so that the sender's address records can be corrected. The views expressed by the sender of this communication do not necessarily represent those of Racelogic Ltd. Please note that Racelogic reserves the right to monitor e-mail communications passing through its network _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
