From: David Brownell <[email protected]>

Minor tweak to the new DaVinci clock code:  look at the PSC module
to make sure the clock is enabled before reporting that it needs
disabling.  This improves the value of those diagnostics.

Docs report a variety of power-up states for peripherals.  DM355
seems to leave most things clocked (but in reset); else, most
clocks will still be off unless the bootloader enabled them.

Also includes a minor fix to the MDCTL write:  DM355 defines
that field as five bits; other cores define the extra bits as
must-be-zero.

Signed-off-by: David Brownell <[email protected]>
---
 arch/arm/mach-davinci/clock.c            |    6 +++++-
 arch/arm/mach-davinci/include/mach/psc.h |    1 +
 arch/arm/mach-davinci/psc.c              |   13 ++++++++++++-
 3 files changed, 18 insertions(+), 2 deletions(-)

--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -163,7 +163,11 @@ static int __init clk_disable_unused(voi
                if (!(ck->flags & CLK_PSC))
                        continue;
 
-               printk(KERN_INFO "Clocks: disable unused %s\n", ck->name);
+               /* ignore if in Disabled or SwRstDisable states */
+               if (!davinci_psc_is_clk_active(ck->lpsc))
+                       continue;
+
+               pr_info("Clocks: disable unused %s\n", ck->name);
                davinci_psc_config(psc_domain(ck), ck->lpsc, 0);
        }
        spin_unlock_irq(&clockfw_lock);
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -116,6 +116,7 @@
 #define DM646X_LPSC_TIMER1         35
 #define DM646X_LPSC_ARM_INTC       45
 
+extern int davinci_psc_is_clk_active(unsigned int id);
 extern void davinci_psc_config(unsigned int domain, unsigned int id,
                               char enable);
 
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -39,6 +39,17 @@
 #define MDSTAT         0x800
 #define MDCTL          0xA00
 
+
+/* Return nonzero iff the domain's clock is active */
+int __init davinci_psc_is_clk_active(unsigned int id)
+{
+       void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE);
+       u32 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
+
+       /* if clocked, state can be "Enable" or "SyncReset" */
+       return mdstat & BIT(12);
+}
+
 /* Enable or disable a PSC domain */
 void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
 {
@@ -49,7 +60,7 @@ void davinci_psc_config(unsigned int dom
        if (enable)
                mdctl |= 0x00000003;    /* Enable Module */
        else
-               mdctl &= 0xFFFFFFF2;    /* Disable Module */
+               mdctl &= 0xFFFFFFE2;    /* Disable Module */
        __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
 
        pdstat = __raw_readl(psc_base + PDSTAT);


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